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soc/intel/cannonlake/acpi: Add board level s0ix call back 

Add board level s0ix call back. Since some driver doesn't
care _ON/_OFF method. Add a control method for s0ix usage.

BUG=b:129177593
TEST=NA

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I404f388b19355ae89b36d1fb07f9fb4f97eb3b2d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Eric Lai 2019-05-02 15:13:31 +08:00 committed by Patrick Georgi
parent e59ae107c2
commit 7f1e9dbf3a
1 changed files with 10 additions and 0 deletions
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10
src/soc/intel/cannonlake/acpi/lpit.asl
View File

@ -14,6 +14,8 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
External(\_SB.MS0X, MethodObj)
scope(\_SB) scope(\_SB)
{ {
Device(LPID) { Device(LPID) {
@ -62,12 +64,20 @@ scope(\_SB)
*/ */
If(Arg2 == 5) { If(Arg2 == 5) {
\_SB.PCI0.LPCB.EC0.S0IX(1) \_SB.PCI0.LPCB.EC0.S0IX(1)
/* provide board level s0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(1)
}
} }
/* /*
* Function 6. * Function 6.
*/ */
If(Arg2 == 6) { If(Arg2 == 6) {
\_SB.PCI0.LPCB.EC0.S0IX(0) \_SB.PCI0.LPCB.EC0.S0IX(0)
/* provide board level s0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(0)
}
} }
} }
Return(Buffer(One) {0x00}) Return(Buffer(One) {0x00})