AGESA f14: Fix infinite loop

Fix regression after commit:
  22f32c7 cpu/amd/agesa: Unify init files

Change-Id: I36fb7369084c68577df69abc251c84dad64f7015
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18822
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
This commit is contained in:
Kyösti Mälkki 2017-03-15 08:45:00 +02:00 committed by Patrick Georgi
parent 0853055ef7
commit 7f3741840c
1 changed files with 1 additions and 1 deletions

View File

@ -62,7 +62,7 @@ static void model_14_init(device_t dev)
msr.lo = msr.hi = 0x1e1e1e1e;
wrmsr(0x250, msr);
wrmsr(0x258, msr);
for (msrno = 0x268; msrno <= 0x26f; i++)
for (msrno = 0x268; msrno <= 0x26f; msrno++)
wrmsr(msrno, msr);
msr = rdmsr(SYSCFG_MSR);