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mb/google/kahlee: Increase VRAM from 16 to 32 MiB 

While adequate for ChromeOS, 16MiB VRAM is insufficient for current
mainline Linux and Windows amdgpu drivers to operate properly. Under
Linux, the driver fails to allocate a framebuffer and causes multiple
kernel panics. Under Windows, the driver fails to load due to
insufficient resources available. Revert the VRAM allocation to the
previous amount of 32MiB.

This change reverts
commit 87dcd0061a ("mainboard/google/kahlee: Reduce VRAM to 16MB")

Test: build/boot Linux 5.17.x on google/liara, verify framebuffer
allocation succeeds and no kernel panic reported.

Change-Id: I1967a203fed80456a20af00943eba21bc1c0577b
Signed-off-by: Matt DeVillier (AMD) <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66022
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier (AMD) 2022-07-20 15:39:06 -05:00 committed by Martin Roth
parent c38347873e
commit 7f7f65cfb9
6 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/kahlee/variants/aleena/devicetree.cb
View File

@ -7,7 +7,7 @@ chip soc/amd/stoneyridge
}"
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "16 * MiB"
register "uma_size" = "32 * MiB"
register "stapm_percent" = "80"
register "stapm_time_ms" = "2500000"
register "stapm_power_mw" = "7800"

2
src/mainboard/google/kahlee/variants/careena/devicetree.cb
View File

@ -7,7 +7,7 @@ chip soc/amd/stoneyridge
}"
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "16 * MiB"
register "uma_size" = "32 * MiB"
register "stapm_percent" = "68"
register "stapm_time_ms" = "2500000"
register "stapm_power_mw" = "7800"

2
src/mainboard/google/kahlee/variants/grunt/devicetree.cb
View File

@ -7,7 +7,7 @@ chip soc/amd/stoneyridge
}"
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "16 * MiB"
register "uma_size" = "32 * MiB"
register "stapm_percent" = "80"
register "stapm_time_ms" = "2500000"
register "stapm_power_mw" = "7800"

2
src/mainboard/google/kahlee/variants/liara/devicetree.cb
View File

@ -7,7 +7,7 @@ chip soc/amd/stoneyridge
}"
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "16 * MiB"
register "uma_size" = "32 * MiB"
register "lvds_poseq_varybl_to_blon" = "0x5" # in 4ms
register "lvds_poseq_blon_to_varybl" = "0x5" # in 4ms

2
src/mainboard/google/kahlee/variants/nuwani/devicetree.cb
View File

@ -7,7 +7,7 @@ chip soc/amd/stoneyridge
}"
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "16 * MiB"
register "uma_size" = "32 * MiB"
register "stapm_percent" = "80"
register "stapm_time_ms" = "2000000"
register "stapm_power_mw" = "7800"

2
src/mainboard/google/kahlee/variants/treeya/devicetree.cb
View File

@ -7,7 +7,7 @@ chip soc/amd/stoneyridge
}"
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "16 * MiB"
register "uma_size" = "32 * MiB"
register "stapm_percent" = "80"
register "stapm_time_ms" = "2000000"
register "stapm_power_mw" = "7800"