GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

sb/intel: Use ACPI_COMMON_MADT_IOAPIC 

i82801gx, i82801ix, i82801jx:
Maintain IRQ #0 to GSI #2 override as positive edge trigger.

ibexpeak, emulation/qemu-q35:
Change IRQ #0 to GSI #2 override to positive edge trigger from
the bus ISA default (positive edge).

Change-Id: Ia8a04daf3a79d9f2f4801dc85e4975278e30dc8a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74349
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2023-04-11 00:45:12 +03:00
parent 10bdee1327
commit 7f8e2a6a4a
11 changed files with 4 additions and 78 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/emulation/qemu-q35/Kconfig
View File

@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_FORCE_NATIVE_VGA_INIT if !CHROMEOS
select MEMORY_MAPPED_TPM
select MAINBOARD_HAS_CHROMEOS
select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
select BOOT_DEVICE_NOT_SPI_FLASH
select BOOT_DEVICE_MEMORY_MAPPED

1
src/southbridge/intel/i82801gx/Kconfig
View File

@ -2,6 +2,7 @@
config SOUTHBRIDGE_INTEL_I82801GX
bool
select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS

14
src/southbridge/intel/i82801gx/lpc.c
View File

@ -349,20 +349,6 @@ static void lpc_init(struct device *dev)
i82801gx_fixups(dev);
}
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE);
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL);
return current;
}
static void i82801gx_lpc_read_resources(struct device *dev)
{
struct resource *res;

1
src/southbridge/intel/i82801ix/Kconfig
View File

@ -2,6 +2,7 @@
config SOUTHBRIDGE_INTEL_I82801IX
bool
select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS

4
src/southbridge/intel/i82801ix/Makefile.inc
View File

@ -22,10 +22,6 @@ ramstage-y += ../common/pciehp.c
smm-y += smihandler.c
ifneq ($(CONFIG_BOARD_EMULATION_QEMU_X86_Q35),y)
ramstage-y += madt.c
endif
CPPFLAGS_common += -I$(src)/southbridge/intel/i82801ix/include
endif

19
src/southbridge/intel/i82801ix/madt.c
View File

@ -1,19 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE);
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL);
return current;
}

1
src/southbridge/intel/i82801jx/Kconfig
View File

@ -2,6 +2,7 @@
config SOUTHBRIDGE_INTEL_I82801JX
bool
select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select AZALIA_PLUGIN_SUPPORT

14
src/southbridge/intel/i82801jx/lpc.c
View File

@ -379,20 +379,6 @@ static void lpc_init(struct device *dev)
i82801jx_set_acpi_mode(dev);
}
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE);
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL);
return current;
}
static void i82801jx_lpc_read_resources(struct device *dev)
{
int i, io_index = 0;

1
src/southbridge/intel/ibexpeak/Kconfig
View File

@ -7,6 +7,7 @@ if SOUTHBRIDGE_INTEL_IBEXPEAK
config SOUTH_BRIDGE_OPTIONS
def_bool y
select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select AZALIA_PLUGIN_SUPPORT

1
src/southbridge/intel/ibexpeak/Makefile.inc
View File

@ -20,7 +20,6 @@ ramstage-y += ../common/pciehp.c
ramstage-y += ../bd82x6x/me_status.c
ramstage-$(CONFIG_ELOG) += ../bd82x6x/elog.c
ramstage-y += madt.c
smm-y += smihandler.c

25
src/southbridge/intel/ibexpeak/madt.c
View File

@ -1,25 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/ioapic.h>
#include <acpi/acpi.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci.h>
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
/* INT_SRC_OVR */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2,
MP_IRQ_POLARITY_DEFAULT |
MP_IRQ_TRIGGER_DEFAULT);
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 9, 9,
MP_IRQ_POLARITY_HIGH |
MP_IRQ_TRIGGER_LEVEL);
return current;
}