mb/amd/mandolin: enable SoC UARTs 0 and 1 and disable 2 and 3
There are only headers for the SoC's UART 0 and 1 on the board. BUG=b:165020060 TEST=Linux only detects UART 0 and 1. Change-Id: I45929f65a5f844ae5cef792b11176f487c80766f Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44530 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -155,4 +155,10 @@ chip soc/amd/picasso
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device pci 18.6 on end
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device pci 18.7 on end
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end # domain
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device mmio 0xfedc9000 on end # UART0
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device mmio 0xfedca000 on end # UART1
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device mmio 0xfedce000 off end # UART2
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device mmio 0xfedcf000 off end # UART3
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end # chip soc/amd/picasso
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