mb/amd/mandolin: enable SoC UARTs 0 and 1 and disable 2 and 3

There are only headers for the SoC's UART 0 and 1 on the board.

BUG=b:165020060
TEST=Linux only detects UART 0 and 1.

Change-Id: I45929f65a5f844ae5cef792b11176f487c80766f
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44530
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2020-08-17 20:00:31 +02:00
parent b69549bb07
commit 7f94b405be
1 changed files with 6 additions and 0 deletions

View File

@ -155,4 +155,10 @@ chip soc/amd/picasso
device pci 18.6 on end
device pci 18.7 on end
end # domain
device mmio 0xfedc9000 on end # UART0
device mmio 0xfedca000 on end # UART1
device mmio 0xfedce000 off end # UART2
device mmio 0xfedcf000 off end # UART3
end # chip soc/amd/picasso