intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selected

Enable TCO SMIs in common code, if selected by Kconfig. This is needed
for the follow-up commits regarding INTRUDER interrupt.

Tested on X11SSM-F.

Change-Id: If63effe74ac59b5d051a6454bc6375bb89605215
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39262
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Michael Niewöhner 2020-03-03 20:15:02 +01:00 committed by Patrick Georgi
parent 8034813581
commit 7f9ceef51b
6 changed files with 10 additions and 7 deletions

View File

@ -78,7 +78,7 @@
#endif
#define USB_EN (1 << SMI_XHCI) /* Legacy USB2 SMI logic */
#define PERIODIC_EN (1 << SMI_PERIODIC) /* SMI on PERIODIC_STS in SMI_STS */
#define TCO_EN (1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */
#define TCO_SMI_EN (1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */
#define GPIO_EN (1 << SMI_GPIO) /* Enable GPIO SMI */
#define BIOS_RLS (1 << SMI_BIOS_RLS) /* asserts SCI on bit set */
/* start software smi timer on bit set */
@ -99,7 +99,7 @@
* - on eSPI events (does nothing on LPC systems)
* No SMIs:
* - on microcontroller writes (io 0x62/0x66)
* - on TCO events
* - on TCO events, unless enabled in common code
*/
#define ENABLE_SMI_PARAMS \
(ESPI_SMI_EN | APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS | GPIO_EN)

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@ -128,7 +128,7 @@
* - on eSPI events (does nothing on LPC systems)
* No SMIs:
* - on microcontroller writes (io 0x62/0x66)
* - on TCO events
* - on TCO events, unless enabled in common code
*/
#define ENABLE_SMI_PARAMS \
(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)

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@ -63,13 +63,16 @@ void smm_southbridge_enable(uint16_t pm1_events)
* - on writes to SLP_EN (sleep states)
* - on writes to GBL_RLS (bios commands)
* - on eSPI events, unless disabled (does nothing on LPC systems)
* - on TCO events (TIMEOUT, case intrusion, ...), if enabled
* No SMIs:
* - on microcontroller writes (io 0x62/0x66)
* - on TCO events
*/
if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE))
smi_params &= ~ESPI_SMI_EN;
if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE))
smi_params |= TCO_SMI_EN;
/* Enable SMI generation: */
pmc_enable_smi(smi_params);
}

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@ -126,8 +126,8 @@
* - on writes to GBL_RLS (bios commands)
* - on eSPI events (does nothing on LPC systems)
* No SMIs:
* - on TCO events, unless enabled in common code
* - on microcontroller writes (io 0x62/0x66)
* - on TCO events
*/
#define ENABLE_SMI_PARAMS \
(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)

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@ -142,8 +142,8 @@
* - on writes to GBL_RLS (bios commands)
* - on eSPI events (does nothing on LPC systems)
* No SMIs:
* - on TCO events, unless enabled in common code
* - on microcontroller writes (io 0x62/0x66)
* - on TCO events
*/
#define ENABLE_SMI_PARAMS \
(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)

View File

@ -132,8 +132,8 @@
* - on writes to GBL_RLS (bios commands)
* - on eSPI events (does nothing on LPC systems)
* No SMIs:
* - on TCO events, unless enabled in common code
* - on microcontroller writes (io 0x62/0x66)
* - on TCO events
*/
#define ENABLE_SMI_PARAMS \
(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)