intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selected
Enable TCO SMIs in common code, if selected by Kconfig. This is needed for the follow-up commits regarding INTRUDER interrupt. Tested on X11SSM-F. Change-Id: If63effe74ac59b5d051a6454bc6375bb89605215 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39262 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -78,7 +78,7 @@
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#endif
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#define USB_EN (1 << SMI_XHCI) /* Legacy USB2 SMI logic */
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#define PERIODIC_EN (1 << SMI_PERIODIC) /* SMI on PERIODIC_STS in SMI_STS */
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#define TCO_EN (1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */
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#define TCO_SMI_EN (1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */
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#define GPIO_EN (1 << SMI_GPIO) /* Enable GPIO SMI */
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#define BIOS_RLS (1 << SMI_BIOS_RLS) /* asserts SCI on bit set */
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/* start software smi timer on bit set */
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@ -99,7 +99,7 @@
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* - on eSPI events (does nothing on LPC systems)
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* No SMIs:
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* - on microcontroller writes (io 0x62/0x66)
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* - on TCO events
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* - on TCO events, unless enabled in common code
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*/
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#define ENABLE_SMI_PARAMS \
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(ESPI_SMI_EN | APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS | GPIO_EN)
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@ -128,7 +128,7 @@
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* - on eSPI events (does nothing on LPC systems)
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* No SMIs:
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* - on microcontroller writes (io 0x62/0x66)
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* - on TCO events
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* - on TCO events, unless enabled in common code
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*/
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#define ENABLE_SMI_PARAMS \
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(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)
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@ -63,13 +63,16 @@ void smm_southbridge_enable(uint16_t pm1_events)
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* - on writes to SLP_EN (sleep states)
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* - on writes to GBL_RLS (bios commands)
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* - on eSPI events, unless disabled (does nothing on LPC systems)
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* - on TCO events (TIMEOUT, case intrusion, ...), if enabled
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* No SMIs:
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* - on microcontroller writes (io 0x62/0x66)
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* - on TCO events
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*/
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if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE))
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smi_params &= ~ESPI_SMI_EN;
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if (CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE))
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smi_params |= TCO_SMI_EN;
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/* Enable SMI generation: */
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pmc_enable_smi(smi_params);
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}
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@ -126,8 +126,8 @@
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* - on writes to GBL_RLS (bios commands)
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* - on eSPI events (does nothing on LPC systems)
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* No SMIs:
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* - on TCO events, unless enabled in common code
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* - on microcontroller writes (io 0x62/0x66)
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* - on TCO events
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*/
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#define ENABLE_SMI_PARAMS \
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(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)
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@ -142,8 +142,8 @@
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* - on writes to GBL_RLS (bios commands)
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* - on eSPI events (does nothing on LPC systems)
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* No SMIs:
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* - on TCO events, unless enabled in common code
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* - on microcontroller writes (io 0x62/0x66)
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* - on TCO events
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*/
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#define ENABLE_SMI_PARAMS \
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(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)
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@ -132,8 +132,8 @@
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* - on writes to GBL_RLS (bios commands)
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* - on eSPI events (does nothing on LPC systems)
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* No SMIs:
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* - on TCO events, unless enabled in common code
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* - on microcontroller writes (io 0x62/0x66)
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* - on TCO events
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*/
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#define ENABLE_SMI_PARAMS \
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(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)
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