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Fam15tn: Move SPD read from mainboards into wrapper 

Continuing with the mainboard cleanup for F15tn, move the functions
to read the SPD from the mainboards for Thatcher and Parmer into the
wrapper for the northbridge/amd/agesa/family15tn.

Move the SPD address customization for the mainboard into the
devicetree.cb file.

Unrelated side note - Porting.h has an un-closed #pragma pack(1)
that can cause confusing side-effects.  AGESA's structures all
use this, but coreboot's don't.  Be sure to include the coreboot
.h files BEFORE Porting.h is included, not after.

This fix has been tested.

Change-Id: I89cdd225be61f60c6b8e7020e6f8b879983bbd96
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/2190
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
This commit is contained in:
Martin Roth 2013-01-20 10:38:58 -07:00
parent 50c0a50ac6
commit 7fb692bd86
16 changed files with 81 additions and 303 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
src/mainboard/amd/parmer/BiosCallOuts.c
View File

@ -19,7 +19,6 @@
#include "agesawrapper.h" #include "agesawrapper.h"
#include "amdlib.h" #include "amdlib.h"
#include "dimmSpd.h"
#include "BiosCallOuts.h" #include "BiosCallOuts.h"
#include "Ids.h" #include "Ids.h"
#include "OptionsIds.h" #include "OptionsIds.h"
@ -33,10 +32,10 @@ STATIC CONST BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_DEALLOCATE_BUFFER, fam15tn_DeallocateBuffer }, {AGESA_DEALLOCATE_BUFFER, fam15tn_DeallocateBuffer },
{AGESA_DO_RESET, fam15tn_Reset }, {AGESA_DO_RESET, fam15tn_Reset },
{AGESA_LOCATE_BUFFER, fam15tn_LocateBuffer }, {AGESA_LOCATE_BUFFER, fam15tn_LocateBuffer },
{AGESA_READ_SPD, BiosReadSpd }, {AGESA_READ_SPD, fam15tn_ReadSpd },
{AGESA_READ_SPD_RECOVERY, fam15tn_DefaultRet }, {AGESA_READ_SPD_RECOVERY, fam15tn_DefaultRet },
{AGESA_RUNFUNC_ONAP, fam15tn_RunFuncOnAp }, {AGESA_RUNFUNC_ONAP, fam15tn_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, fam15tn_GetIdsInitData }, {AGESA_GET_IDS_INIT_DATA, fam15tn_GetIdsInitData },
{AGESA_HOOKBEFORE_DQS_TRAINING, fam15tn_HookBeforeDQSTraining }, {AGESA_HOOKBEFORE_DQS_TRAINING, fam15tn_HookBeforeDQSTraining },
{AGESA_HOOKBEFORE_EXIT_SELF_REF, fam15tn_HookBeforeExitSelfRefresh }, {AGESA_HOOKBEFORE_EXIT_SELF_REF, fam15tn_HookBeforeExitSelfRefresh },
{AGESA_FCH_OEM_CALLOUT, Fch_Oem_config }, {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config },
@ -63,14 +62,6 @@ AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
return CalloutStatus; return CalloutStatus;
} }
AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status;
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
return Status;
}
/** /**
* AMD Parmer Platform ALC272 Verb Table * AMD Parmer Platform ALC272 Verb Table
*/ */

3
src/mainboard/amd/parmer/BiosCallOuts.h
View File

@ -25,9 +25,6 @@
/* CALLOUT Initialization */ /* CALLOUT Initialization */
AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr); AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* AGESA ADVANCED CALLOUTS - MEMORY */
AGESA_STATUS BiosReadSpd (UINT32 Func,UINT32 Data,VOID *ConfigPtr);
/* FCH OEM Config*/ /* FCH OEM Config*/
AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr);

2
src/mainboard/amd/parmer/Makefile.inc
View File

@ -19,12 +19,10 @@
romstage-y += buildOpts.c romstage-y += buildOpts.c
romstage-y += agesawrapper.c romstage-y += agesawrapper.c
romstage-y += dimmSpd.c
romstage-y += BiosCallOuts.c romstage-y += BiosCallOuts.c
romstage-y += PlatformGnbPcie.c romstage-y += PlatformGnbPcie.c
ramstage-y += buildOpts.c ramstage-y += buildOpts.c
ramstage-y += agesawrapper.c ramstage-y += agesawrapper.c
ramstage-y += dimmSpd.c
ramstage-y += BiosCallOuts.c ramstage-y += BiosCallOuts.c
ramstage-y += PlatformGnbPcie.c ramstage-y += PlatformGnbPcie.c

16
src/mainboard/amd/parmer/devicetree.cb
View File

@ -51,16 +51,10 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 13.2 on end # USB device pci 13.2 on end # USB
device pci 14.0 on # SMBUS device pci 14.0 on # SMBUS
chip drivers/generic/generic #dimm 0 chip drivers/generic/generic #dimm 0
device i2c 50 on end device i2c 50 on end # 7-bit SPD address
end end
chip drivers/generic/generic #dimm 1 chip drivers/generic/generic #dimm 1
device i2c 51 on end device i2c 51 on end # 7-bit SPD address
end
chip drivers/generic/generic #dimm 0-1-0
device i2c 52 on end
end
chip drivers/generic/generic #dimm 0-1-1
device i2c 53 on end
end end
end # SM end # SM
device pci 14.1 on end # IDE 0x439c device pci 14.1 on end # IDE 0x439c
@ -85,6 +79,12 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
register "spdAddrLookup" = "
{
{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
}"
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
end #pci_domain end #pci_domain
end #chip northbridge/amd/agesa/family15tn/root_complex end #chip northbridge/amd/agesa/family15tn/root_complex

15
src/mainboard/amd/thatcher/BiosCallOuts.c
View File

@ -19,7 +19,6 @@
#include "agesawrapper.h" #include "agesawrapper.h"
#include "amdlib.h" #include "amdlib.h"
#include "dimmSpd.h"
#include "BiosCallOuts.h" #include "BiosCallOuts.h"
#include "Ids.h" #include "Ids.h"
#include "OptionsIds.h" #include "OptionsIds.h"
@ -33,10 +32,10 @@ STATIC CONST BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_DEALLOCATE_BUFFER, fam15tn_DeallocateBuffer }, {AGESA_DEALLOCATE_BUFFER, fam15tn_DeallocateBuffer },
{AGESA_DO_RESET, fam15tn_Reset }, {AGESA_DO_RESET, fam15tn_Reset },
{AGESA_LOCATE_BUFFER, fam15tn_LocateBuffer }, {AGESA_LOCATE_BUFFER, fam15tn_LocateBuffer },
{AGESA_READ_SPD, BiosReadSpd }, {AGESA_READ_SPD, fam15tn_ReadSpd },
{AGESA_READ_SPD_RECOVERY, fam15tn_DefaultRet }, {AGESA_READ_SPD_RECOVERY, fam15tn_DefaultRet },
{AGESA_RUNFUNC_ONAP, fam15tn_RunFuncOnAp }, {AGESA_RUNFUNC_ONAP, fam15tn_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, fam15tn_GetIdsInitData }, {AGESA_GET_IDS_INIT_DATA, fam15tn_GetIdsInitData },
{AGESA_HOOKBEFORE_DQS_TRAINING, fam15tn_HookBeforeDQSTraining }, {AGESA_HOOKBEFORE_DQS_TRAINING, fam15tn_HookBeforeDQSTraining },
{AGESA_HOOKBEFORE_EXIT_SELF_REF, fam15tn_HookBeforeExitSelfRefresh }, {AGESA_HOOKBEFORE_EXIT_SELF_REF, fam15tn_HookBeforeExitSelfRefresh },
{AGESA_FCH_OEM_CALLOUT, Fch_Oem_config }, {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config },
@ -63,14 +62,6 @@ AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
return CalloutStatus; return CalloutStatus;
} }
AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status;
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
return Status;
}
/** /**
* AMD Thatcher Platform ALC272 Verb Table * AMD Thatcher Platform ALC272 Verb Table
*/ */

3
src/mainboard/amd/thatcher/BiosCallOuts.h
View File

@ -25,9 +25,6 @@
/* CALLOUT Initialization */ /* CALLOUT Initialization */
AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr); AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* AGESA ADVANCED CALLOUTS - MEMORY */
AGESA_STATUS BiosReadSpd (UINT32 Func,UINT32 Data,VOID *ConfigPtr);
/* FCH OEM Config*/ /* FCH OEM Config*/
AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr);

2
src/mainboard/amd/thatcher/Makefile.inc
View File

@ -19,12 +19,10 @@
romstage-y += buildOpts.c romstage-y += buildOpts.c
romstage-y += agesawrapper.c romstage-y += agesawrapper.c
romstage-y += dimmSpd.c
romstage-y += BiosCallOuts.c romstage-y += BiosCallOuts.c
romstage-y += PlatformGnbPcie.c romstage-y += PlatformGnbPcie.c
ramstage-y += buildOpts.c ramstage-y += buildOpts.c
ramstage-y += agesawrapper.c ramstage-y += agesawrapper.c
ramstage-y += dimmSpd.c
ramstage-y += BiosCallOuts.c ramstage-y += BiosCallOuts.c
ramstage-y += PlatformGnbPcie.c ramstage-y += PlatformGnbPcie.c

16
src/mainboard/amd/thatcher/devicetree.cb
View File

@ -51,16 +51,10 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 13.2 on end # USB device pci 13.2 on end # USB
device pci 14.0 on # SMBUS device pci 14.0 on # SMBUS
chip drivers/generic/generic #dimm 0 chip drivers/generic/generic #dimm 0
device i2c 50 on end device i2c 50 on end # 7-bit SPD address
end end
chip drivers/generic/generic #dimm 1 chip drivers/generic/generic #dimm 1
device i2c 51 on end device i2c 51 on end # 7-bit SPD address
end
chip drivers/generic/generic #dimm 0-1-0
device i2c 52 on end
end
chip drivers/generic/generic #dimm 0-1-1
device i2c 53 on end
end end
end # SM end # SM
device pci 14.1 on end # IDE 0x439c device pci 14.1 on end # IDE 0x439c
@ -100,6 +94,12 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
register "spdAddrLookup" = "
{
{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
}"
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
end #pci_domain end #pci_domain
end #chip northbridge/amd/agesa/family15tn/root_complex end #chip northbridge/amd/agesa/family15tn/root_complex

166
src/mainboard/amd/thatcher/dimmSpd.c
View File

@ -1,166 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "Porting.h"
#include "AGESA.h"
#include "amdlib.h"
#include "dimmSpd.h"
#define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
/*#pragma optimize ("", off) // for source level debug
*---------------------------------------------------------------------------
*
* SPD address table - porting required
*/
static const UINT8 spdAddressLookup [2] [2] [4] = // socket, channel, dimm
{
// socket 0
{
{0xA0, 0x00}, // channel 0 dimms
{0xA2, 0x00}, // channel 1 dimms
},
// socket 1
{
{0x00, 0x00}, // channel 0 dimms
{0x00, 0x00}, // channel 1 dimms
},
};
/*-----------------------------------------------------------------------------
*
* readSmbusByteData - read a single SPD byte from any offset
*/
static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
{
unsigned int status;
UINT64 limit;
address |= 1; // set read bit
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 1, 0x1F); // clear error status
__outbyte (iobase + 3, offset); // offset in eeprom
__outbyte (iobase + 4, address); // slave address and read bit
__outbyte (iobase + 2, 0x48); // read byte command
// time limit to avoid hanging for unexpected error status (should never happen)
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*-----------------------------------------------------------------------------
*
* readSmbusByte - read a single SPD byte from the default offset
* this function is faster function readSmbusByteData
*/
static int readSmbusByte (int iobase, int address, char *buffer)
{
unsigned int status;
UINT64 limit;
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 2, 0x44); // read command
// time limit to avoid hanging for unexpected error status
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*---------------------------------------------------------------------------
*
* readspd - Read one or more SPD bytes from a DIMM.
* Start with offset zero and read sequentially.
* Optimization relies on autoincrement to avoid
* sending offset for every byte.
* Reads 128 bytes in 7-8 ms at 400 KHz.
*/
static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
{
int index, error;
/* read the first byte using offset zero */
error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0);
if (error) return error;
/* read the remaining bytes using auto-increment for speed */
for (index = 1; index < count; index++)
{
error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
if (error) return error;
}
return 0;
}
static void writePmReg (int reg, int data)
{
__outbyte (0xCD6, reg);
__outbyte (0xCD7, data);
}
static void setupFch (int ioBase)
{
writePmReg (0x2D, ioBase >> 8);
writePmReg (0x2C, ioBase | 1);
//writePmReg (0x29, 0x80);
//writePmReg (0x28, 0x61);
__outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
}
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress, ioBase;
if (info->SocketId >= DIMENSION (spdAddressLookup )) return AGESA_ERROR;
if (info->MemChannelId >= DIMENSION (spdAddressLookup[0] )) return AGESA_ERROR;
if (info->DimmId >= DIMENSION (spdAddressLookup[0][0])) return AGESA_ERROR;
spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId];
if (spdAddress == 0) return AGESA_ERROR;
ioBase = 0xB00;
setupFch (ioBase);
return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
}

59
src/mainboard/amd/thatcher/dimmSpd.h
View File

@ -1,59 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*----------------------------------------------------------------------------------------
* M O D U L E S U S E D
*----------------------------------------------------------------------------------------
*/
#ifndef _DIMMSPD_H_
#define _DIMMSPD_H_
#include "Porting.h"
#include "AGESA.h"
/*----------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* T Y P E D E F S A N D S T R U C T U R E S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* P R O T O T Y P E S O F L O C A L F U N C T I O N S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* E X P O R T E D F U N C T I O N S
*----------------------------------------------------------------------------------------
*/
AGESA_STATUS
AmdMemoryReadSPD (IN UINT32 Func, IN UINT32 Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
/*---------------------------------------------------------------------------------------
* L O C A L F U N C T I O N S
*---------------------------------------------------------------------------------------
*/
#endif

3
src/northbridge/amd/agesa/family15tn/Makefile.inc
View File

@ -18,7 +18,8 @@
# #
romstage-y += fam15tn_callouts.c romstage-y += fam15tn_callouts.c
romstage-y += dimmSpd.c
ramstage-y += northbridge.c ramstage-y += northbridge.c
ramstage-y += fam15tn_callouts.c ramstage-y += fam15tn_callouts.c
ramstage-y += dimmSpd.c

28
src/northbridge/amd/agesa/family15tn/chip.h Normal file
View File

@ -0,0 +1,28 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Sage Electronic Engineering, LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _AGESA_FAM15TN_CHIP_H_
#define _AGESA_FAM15TN_CHIP_H_
struct northbridge_amd_agesa_family15tn_config
{
u8 spdAddrLookup[2][2][4];
};
#endif

44
src/mainboard/amd/parmer/dimmSpd.c → src/northbridge/amd/agesa/family15tn/dimmSpd.c
View File

@ -17,33 +17,19 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <device/pci_def.h>
#include <device/device.h>
/* warning: Porting.h includes an open #pragma pack(1) */
#include "Porting.h" #include "Porting.h"
#include "AGESA.h" #include "AGESA.h"
#include "amdlib.h" #include "amdlib.h"
#include "dimmSpd.h" #include "dimmSpd.h"
#include "chip.h"
#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) #define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
/*#pragma optimize ("", off) // for source level debug
*---------------------------------------------------------------------------
*
* SPD address table - porting required
*/
static const UINT8 spdAddressLookup [2] [2] [4] = // socket, channel, dimm
{
// socket 0
{
{0xA0, 0x00}, // channel 0 dimms
{0xA2, 0x00}, // channel 1 dimms
},
// socket 1
{
{0x00, 0x00}, // channel 0 dimms
{0x00, 0x00}, // channel 1 dimms
},
};
/*----------------------------------------------------------------------------- /*-----------------------------------------------------------------------------
* *
* readSmbusByteData - read a single SPD byte from any offset * readSmbusByteData - read a single SPD byte from any offset
@ -151,12 +137,22 @@ static void setupFch (int ioBase)
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{ {
int spdAddress, ioBase; int spdAddress, ioBase;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info;
if (info->SocketId >= DIMENSION (spdAddressLookup )) return AGESA_ERROR; if ((dev == 0) || (config == 0))
if (info->MemChannelId >= DIMENSION (spdAddressLookup[0] )) return AGESA_ERROR; return AGESA_ERROR;
if (info->DimmId >= DIMENSION (spdAddressLookup[0][0])) return AGESA_ERROR;
if (info->SocketId >= DIMENSION(config->spdAddrLookup ))
return AGESA_ERROR;
if (info->MemChannelId >= DIMENSION(config->spdAddrLookup[0] ))
return AGESA_ERROR;
if (info->DimmId >= DIMENSION(config->spdAddrLookup[0][0]))
return AGESA_ERROR;
spdAddress = config->spdAddrLookup
[info->SocketId] [info->MemChannelId] [info->DimmId];
spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId];
if (spdAddress == 0) return AGESA_ERROR; if (spdAddress == 0) return AGESA_ERROR;
ioBase = 0xB00; ioBase = 0xB00;
setupFch (ioBase); setupFch (ioBase);

3
src/mainboard/amd/parmer/dimmSpd.h → src/northbridge/amd/agesa/family15tn/dimmSpd.h
View File

@ -25,9 +25,6 @@
#ifndef _DIMMSPD_H_ #ifndef _DIMMSPD_H_
#define _DIMMSPD_H_ #define _DIMMSPD_H_
#include "Porting.h"
#include "AGESA.h"
/*---------------------------------------------------------------------------------------- /*----------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S * D E F I N I T I O N S A N D M A C R O S
*---------------------------------------------------------------------------------------- *----------------------------------------------------------------------------------------

8
src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
View File

@ -24,6 +24,7 @@
#include "heapManager.h" #include "heapManager.h"
#include "FchPlatform.h" #include "FchPlatform.h"
#include "cbfs.h" #include "cbfs.h"
#include "dimmSpd.h"
#include "fam15tn_callouts.h" #include "fam15tn_callouts.h"
AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr) AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
@ -405,3 +406,10 @@ AGESA_STATUS fam15tn_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *Con
return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS; return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
} }
AGESA_STATUS fam15tn_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status;
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
return Status;
}

1
src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h
View File

@ -49,5 +49,6 @@ AGESA_STATUS fam15tn_HookBeforeDQSTraining (UINT32 Func, UINT32 Data, VOID *Conf
AGESA_STATUS fam15tn_HookBeforeExitSelfRefresh (UINT32 Func, UINT32 Data, VOID *ConfigPtr); AGESA_STATUS fam15tn_HookBeforeExitSelfRefresh (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS fam15tn_DefaultRet (UINT32 Func, UINT32 Data, VOID *ConfigPtr); AGESA_STATUS fam15tn_DefaultRet (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS fam15tn_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt); AGESA_STATUS fam15tn_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt);
AGESA_STATUS fam15tn_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
#endif /* CALLOUTS_AMD_AGESA_FAM15TN_H */ #endif /* CALLOUTS_AMD_AGESA_FAM15TN_H */