mb/google/nissa/var/craask: Add GTCH7503 and split TS by SSFC
Add G2 touchscreen GTCH7503 for craaskino. Use SSFC to separate touchscreen settings. Bit 38-41 for TS_SOURCE: (1) TS_UNPROVISIONED --> 0 (2) TS_GTCH7503 --> 1 BUG=b:277979947 TEST=(1) emerge-nissa coreboot (2) Test on craaskino with G2 touchscreen (3) Test on craaskino with elan touchscreen Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Change-Id: I636f21be39f26a617653e134129a11479e801ea2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Derek Huang <derekhuang@google.com>
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@ -237,6 +237,7 @@ config BOARD_GOOGLE_CRAASK
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select DRIVERS_INTEL_MIPI_CAMERA
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select DRIVERS_INTEL_MIPI_CAMERA
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select HAVE_WWAN_POWER_SEQUENCE
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select HAVE_WWAN_POWER_SEQUENCE
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select CHROMEOS_WIFI_SAR if CHROMEOS
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select CHROMEOS_WIFI_SAR if CHROMEOS
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select EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG
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config BOARD_GOOGLE_OSIRIS
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config BOARD_GOOGLE_OSIRIS
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bool "-> Osiris"
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bool "-> Osiris"
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@ -31,6 +31,10 @@ fw_config
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option CODEC_ALC5682I_VS 0
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option CODEC_ALC5682I_VS 0
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option CODEC_NAU8825 1
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option CODEC_NAU8825 1
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end
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end
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field TS_SOURCE 38 41
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option TS_UNPROVISIONED 0
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option TS_GTCH7503 1
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end
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end
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end
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chip soc/intel/alderlake
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chip soc/intel/alderlake
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@ -322,7 +326,25 @@ chip soc/intel/alderlake
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register "generic.enable_delay_ms" = "12"
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register "generic.enable_delay_ms" = "12"
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register "generic.has_power_resource" = "1"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x01"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 0x40 on end
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device i2c 0x40 on
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probe TS_SOURCE TS_UNPROVISIONED
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end
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end
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chip drivers/i2c/hid
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register "generic.hid" = ""GTCH7503""
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register "generic.desc" = ""G2 Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
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register "generic.reset_delay_ms" = "120"
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register "generic.reset_off_delay_ms" = "3"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
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register "generic.enable_delay_ms" = "12"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 0x40 on
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probe TS_SOURCE TS_GTCH7503
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end
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end
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end
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chip drivers/generic/gpio_keys
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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register "name" = ""PENH""
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@ -353,7 +375,9 @@ chip soc/intel/alderlake
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register "generic.enable_delay_ms" = "1"
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register "generic.enable_delay_ms" = "1"
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register "generic.has_power_resource" = "1"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x01"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 10 on end
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device i2c 10 on
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probe TS_SOURCE TS_UNPROVISIONED
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end
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end
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end
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end
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end
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device ref i2c2 on
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device ref i2c2 on
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