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soc/intel/apollolake: unify definition for spi base address 

Use SPI_BASE_ADDRESS instead of PRERAM_SPI_BASE_ADDRESS like
big core in order make common code implementation straightforward.

Change-Id: Ibcb013fc95de29234253e89c9ca100cc468d44f6
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/27097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Bora Guvendik 2018-06-13 14:46:10 -07:00 committed by Patrick Georgi
parent 90d3b2b0c0
commit 7fe9e8edea
2 changed files with 2 additions and 2 deletions
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2
src/soc/intel/apollolake/bootblock/bootblock.c
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@ -106,7 +106,7 @@ void bootblock_soc_early_init(void)
enable_pm_timer_emulation(); enable_pm_timer_emulation();
fast_spi_early_init(PRERAM_SPI_BASE_ADDRESS); fast_spi_early_init(SPI_BASE_ADDRESS);
fast_spi_cache_bios_region(); fast_spi_cache_bios_region();

2
src/soc/intel/apollolake/include/soc/iomap.h
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@ -47,7 +47,7 @@
#define HECI1_BASE_ADDRESS 0xfed1a000 #define HECI1_BASE_ADDRESS 0xfed1a000
/* Temporary BAR for SPI until PCI enumeration assigns a BAR in ramstage. */ /* Temporary BAR for SPI until PCI enumeration assigns a BAR in ramstage. */
#define PRERAM_SPI_BASE_ADDRESS 0xfe010000 #define SPI_BASE_ADDRESS 0xfe010000
#define EARLY_GSPI_BASE_ADDRESS 0xfe011000 #define EARLY_GSPI_BASE_ADDRESS 0xfe011000
/* Temporary BAR for early I2C bus access */ /* Temporary BAR for early I2C bus access */