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nb/intel/x4x: Remove apic 0 from devicetree 

This is added at runtime.

Change-Id: I7716f8a972e2280179aa6aee00488b22413c0c73
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69298
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2022-11-07 11:49:22 +01:00 committed by Felix Held
parent 98c92570d9
commit 803029685f
18 changed files with 18 additions and 108 deletions
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7
src/mainboard/acer/g43t-am3/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x8086 0x0028 inherit subsystemid 0x8086 0x0028 inherit

7
src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit

7
src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit

7
src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit

7
src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb
View File

@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit

7
src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit

7
src/mainboard/asus/p5qc/variants/p5q/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge

7
src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge

7
src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb
View File

@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge

7
src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge

7
src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge

7
src/mainboard/asus/p5ql-em/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on # Host Bridge device pci 0.0 on # Host Bridge

7
src/mainboard/asus/p5qpl-am/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge

7
src/mainboard/foxconn/g41s-k/devicetree.cb
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@ -1,12 +1,7 @@
## SPDX-License-Identifier: GPL-2.0-or-later ## SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
device pci 0.0 on end # Host Bridge device pci 0.0 on end # Host Bridge

7
src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit

7
src/mainboard/intel/dg41wv/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x1458 0x5000 inherit subsystemid 0x1458 0x5000 inherit

7
src/mainboard/intel/dg43gt/devicetree.cb
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@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x8086 0x0028 inherit subsystemid 0x8086 0x0028 inherit

7
src/mainboard/lenovo/thinkcentre_a58/devicetree.cb
View File

@ -1,12 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
ops x4x_cpu_bus_ops # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
end
device domain 0 on device domain 0 on
ops x4x_pci_domain_ops # PCI domain ops x4x_pci_domain_ops # PCI domain
subsystemid 0x17aa 0x304f inherit subsystemid 0x17aa 0x304f inherit