amdk8: ASL include for K8 temperature sensor support in ACPI
Add a ACPI Source Language snippet which if included as shown in the comments in the file, exposes the 4 possible temperature sensors in the CPU as ACPI thermal zones. Change-Id: I94dd773108e348a0fdb9d2f8d6cfe415d5fa0339 Signed-off-by: Christoph Grenz <christophg+cb@grenz-bonn.de> Reviewed-on: http://review.coreboot.org/222 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Christoph Grenz <christophg+cb@grenz-bonn.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* include this file into a mainboards DSDT inside the PCI device
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* "K8 Miscellaneous Control" and it will expose the temperature
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* sensors of the processor as thermal zones.
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*
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* If, for example, the K8 Misc. Control device is on 0:18.3, include the
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* following inside the PCI0 device:
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*
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* Device(K8MC) {
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* Name (_ADR, 0x00180003)
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* #include northbridge/amd/amdk8/thermal_mixin.asl
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* }
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*
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* Note: as only the current temperature and the trip temperature for
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* "Software Thermal Control" are available in the PCI registers, but the
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* linux driver for thermal zones needs a critical temperature value, a
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* reasonable critical temperature is calculated by simply adding 6°C to
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* the trip temperature.
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*
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* The used registers are documented in the "BIOS and Kernel Developer's
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* Guide for AMD NPT Family 0Fh Processors"
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* http://support.amd.com/us/Processor_TechDocs/32559.pdf
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*
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*/
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#ifndef K8TEMP_CRITICAL_ADD
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# define K8TEMP_CRITICAL_ADD 6
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#endif
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OperationRegion(K8TR, PCI_Config, 0xE4, 0x4)
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Field(K8TR, DWordAcc, NoLock, Preserve) {
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, 1,
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THTP, 1, /* Temperature sensor trip occured */
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CORE, 1, /* Select Core */
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TTS0, 1, /* Temperature sensor trip on CPU1 (or single core CPU0) */
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TTS1, 1, /* Temperature sensor trip on CPU0 */
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TTEN, 1, /* Temperature sensor trip enabled */
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PLAC, 1, /* Select Sensor */
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, 1,
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DOFF, 6, /* Diode offset (signed 6bit-Integer) in °C */
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TFRC, 2, /* Temperature fractions */
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TVAL, 8, /* Temperature value in °C biased by -49 */
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TJOF, 5,
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, 2,
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SWTT, 1, /* Induce a thermtrip event (for diagnostic purposes) */
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}
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OperationRegion(K8ST, PCI_Config, 0x70, 0x1)
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Field(K8ST, ByteAcc, NoLock, Preserve) {
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TMAX, 5, /* Maximum temperature for software thermal control, in °C, biased by 52 */
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}
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/* Calculates temperature in tenths Kelvin from given TVAL and TFRC values */
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Method(K8PT, 2) {
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Divide(Multiply(Arg1, 5), 2, , Local0)
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Return (Add(Multiply(Add(Arg0, 224),10), Local0))
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}
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/* Calculates the diode offset from a DOFF value */
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Method(K8PO, 1) {
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If (And(Arg0, 0x20))
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{
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Return (Multiply(Subtract(Xor(Arg0, 0x3F), 1), 10))
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}
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Else {
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Return (Multiply(Arg0, 10))
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}
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}
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ThermalZone (K8T0) {
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Name(_HID, EisaId("PNP0C11"))
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Name(_UID, "k8-0")
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Name(_STR, Unicode("K8 compatible CPU Core 1 Thermal Sensor 1"))
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Method(_STA) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(Zero, CORE)
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Store(Zero, PLAC)
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If (LOr(PLAC, CORE)) {
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x00)
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}
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If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
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Return (0x00)
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}
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x0F)
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}
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Method(_TMP) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(Zero, CORE)
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Store(Zero, PLAC)
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Store (K8PT(TVAL, TFRC), Local2)
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Add (K8PO(DOFF), Local2, Local2)
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (Local2)
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}
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Method(_CRT) {
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Add(TMAX, 325, Local0)
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Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
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Return (Multiply(Local0, 10))
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}
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}
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ThermalZone (K8T1) {
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Name(_HID, EisaId("PNP0C11"))
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Name(_UID, "k8-1")
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Name(_STR, Unicode("K8 compatible CPU Core 1 Thermal Sensor 2"))
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Name(_TZD, Package () {\_PR.CPU0})
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Method(_STA) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(Zero, CORE)
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Store(Zero, PLAC)
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If (LOr(PLAC, CORE)) {
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x00)
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}
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Store(One, PLAC)
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If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
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Return (0x00)
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}
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x0F)
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}
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Method(_TMP) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(Zero, CORE)
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Store(One, PLAC)
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Store (K8PT(TVAL, TFRC), Local2)
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Add (K8PO(DOFF), Local2, Local2)
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (Local2)
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}
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Method(_CRT) {
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Add(TMAX, 325, Local0)
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Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
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Return (Multiply(Local0, 10))
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}
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}
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ThermalZone (K8T2) {
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Name(_HID, EisaId("PNP0C11"))
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Name(_UID, "k8-2")
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Name(_STR, Unicode("K8 compatible CPU Core 2 Thermal Sensor 1"))
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Name(_TZD, Package () {\_PR.CPU0})
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Method(_STA) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(Zero, CORE)
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Store(Zero, PLAC)
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If (LOr(PLAC, CORE)) {
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x00)
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}
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Store(One, CORE)
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If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
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Return (0x00)
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}
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x0F)
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}
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Method(_TMP) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(One, CORE)
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Store(Zero, PLAC)
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Store (K8PT(TVAL, TFRC), Local2)
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Add (K8PO(DOFF), Local2, Local2)
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (Local2)
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}
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Method(_CRT) {
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Add(TMAX, 325, Local0)
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Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
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Return (Multiply(Local0, 10))
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}
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}
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ThermalZone (K8T3) {
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Name(_HID, EisaId("PNP0C11"))
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Name(_UID, "k8-3")
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Name(_STR, Unicode("K8 compatible CPU Core 2 Thermal Sensor 2"))
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Name(_TZD, Package () {\_PR.CPU0})
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Method(_STA) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(Zero, CORE)
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Store(Zero, PLAC)
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If (LOr(PLAC, CORE)) {
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x00)
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}
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Store(One, CORE)
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Store(One, PLAC)
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If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
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Return (0x00)
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}
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (0x0F)
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}
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Method(_TMP) {
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Store(CORE, Local0)
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Store(PLAC, Local1)
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Store(One, CORE)
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Store(One, PLAC)
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Store (K8PT(TVAL, TFRC), Local2)
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Add (K8PO(DOFF), Local2, Local2)
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Store(Local0, CORE)
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Store(Local1, PLAC)
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Return (Local2)
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}
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Method(_CRT) {
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Add(TMAX, 325, Local0)
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Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
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Return (Multiply(Local0, 10))
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}
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}
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