GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

AGESA: Run ar with DT 

Create libagesa as a thin and deterministic archive file,
this could reduce build time and used space.

Change-Id: Icfd1f3fbf54f7e61ab528fa7686331182959c7d5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/22068
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2017-10-08 21:51:06 +03:00
parent f7c64f9428
commit 807e4232f7
5 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/vendorcode/amd/agesa/f12/Makefile.inc
View File

@ -58,7 +58,7 @@ subdirs-y += $(dir $(shell cd $(dir); find Proc -name Makefile.inc))
$(obj)/libagesa.fam12.a: $$(libagesa-objs)
@printf " AGESA $(subst $(obj)/,,$(@))\n"
$(AR_libagesa) rcs $@ $+
$(AR_libagesa) rcsDT $@ $+
romstage-libs += $(obj)/libagesa.fam12.a
ramstage-libs += $(obj)/libagesa.fam12.a

2
src/vendorcode/amd/agesa/f14/Makefile.inc
View File

@ -59,7 +59,7 @@ subdirs-y += $(dir $(shell cd $(dir); find Proc -name Makefile.inc))
$(obj)/libagesa.fam14.a: $$(libagesa-objs)
@printf " AGESA $(subst $(obj)/,,$(@))\n"
$(AR_libagesa) rcs $@ $+
$(AR_libagesa) rcsDT $@ $+
romstage-libs += $(obj)/libagesa.fam14.a
ramstage-libs += $(obj)/libagesa.fam14.a

2
src/vendorcode/amd/agesa/f15tn/Makefile.inc
View File

@ -63,7 +63,7 @@ subdirs-y += $(dir $(shell cd $(dir); find Proc -name Makefile.inc))
$(obj)/libagesa.fam15tn.a: $$(libagesa-objs)
@printf " AGESA $(subst $(obj)/,,$(@))\n"
$(AR_libagesa) rcs $@ $+
$(AR_libagesa) rcsDT $@ $+
romstage-libs += $(obj)/libagesa.fam15tn.a
ramstage-libs += $(obj)/libagesa.fam15tn.a

2
src/vendorcode/amd/agesa/f16kb/Makefile.inc
View File

@ -63,7 +63,7 @@ subdirs-y += $(dir $(shell cd $(dir); find Proc -name Makefile.inc))
$(obj)/libagesa.fam16kb.a: $$(libagesa-objs)
@printf " AGESA $(subst $(obj)/,,$(@))\n"
$(AR_libagesa) rcs $@ $+
$(AR_libagesa) rcsDT $@ $+
romstage-libs += $(obj)/libagesa.fam16kb.a
ramstage-libs += $(obj)/libagesa.fam16kb.a

2
src/vendorcode/amd/pi/Makefile.inc
View File

@ -140,7 +140,7 @@ $(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_templat
$(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files))
@printf " AGESA $(subst $(obj)/,,$(@))\n"
$(AR_libagesa) rcs $@ $+
$(AR_libagesa) rcsDT $@ $+
bootblock-libs += $(agesa_output_path)/libagesa.a
romstage-libs += $(agesa_output_path)/libagesa.a