From 80d042c4674276e8dfc011ee8755e4c3eaf3e176 Mon Sep 17 00:00:00 2001 From: Raul E Rangel Date: Tue, 20 Mar 2018 12:47:46 -0600 Subject: [PATCH] soc/amd: Print dimm_info and TYPE17_DMI_INFO to help debug incorrect values MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Example output: AGESA TYPE 17 DMI INFO: Handle: 1 TotalWidth: 64 DataWidth: 64 MemorySize: 8192 DeviceSet: 0 Speed: 1200 ManufacturerIdCode: 44416 Attributes: 1 ExtSize: 0 ConfigSpeed: 933 MemoryType: 0x1a FormFactor: 0xd DeviceLocator: DIMM 0 BankLocator: CHANNEL A SerialNumber(8): 00000000 PartNumber(20): HMAA51S6AMR6N-UH CBMEM_ID_MEMINFO: dimm_size: 0 ddr_type: 0x1a ddr_frequency: 1200 rank_per_dimm: 1 channel_num: 0 dimm_num: 0 bank_locator: 0 mod_id: 44416 mod_type: 0x1a bus_width: 64 serial(4): 0000 module_part_number(23): HMAA51S6AMR6N-UH ��@ dimm_size, mod_type, bus_width need to be updated so they return the correct values. module_part_number is missing a null terminator due to the AGESA part number being larger than the dimm_info buffer. Example dmidecode output: Memory Device Array Handle: 0x0000 Error Information Handle: Not Provided Total Width: 8 bits Data Width: 8 bits Size: No Module Installed Form Factor: Unknown Set: None Locator: Channel-0-DIMM-0 Bank Locator: BANK 0 Type: DDR4 Type Detail: Synchronous Speed: 1200 MT/s Manufacturer: Hynix/Hyundai Serial Number: 0000 Asset Tag: Not Specified Part Number: HMAA51S6AMR6N-UH Rank: 1 Configured Clock Speed: 1200 MT/s Minimum Voltage: Unknown Maximum Voltage: Unknown Configured Voltage: Unknown To enable the output set CONFIG_DEBUG_RAM_SETUP. The Kconfig change is required in order to enable CONFIG_DEBUG_RAM_SETUP, otherwise it's not a valid option. BUG=b:65403853 TEST=Test output shown above Signed-off-by: Raul E Rangel Change-Id: I5eac00b9400056357915761287770a400b3f9f8b Reviewed-on: https://review.coreboot.org/25303 Tested-by: build bot (Jenkins) Reviewed-by: Richard Spiegel Reviewed-by: Aaron Durbin --- src/soc/amd/common/block/pi/Kconfig | 1 + src/soc/amd/common/block/pi/amd_late_init.c | 76 +++++++++++++++++++++ 2 files changed, 77 insertions(+) diff --git a/src/soc/amd/common/block/pi/Kconfig b/src/soc/amd/common/block/pi/Kconfig index 273598b0bd..bd5926fdc4 100644 --- a/src/soc/amd/common/block/pi/Kconfig +++ b/src/soc/amd/common/block/pi/Kconfig @@ -1,5 +1,6 @@ config SOC_AMD_COMMON_BLOCK_PI bool + select HAVE_DEBUG_RAM_SETUP default n help This option builds functions that interface AMD's AGESA. diff --git a/src/soc/amd/common/block/pi/amd_late_init.c b/src/soc/amd/common/block/pi/amd_late_init.c index ffb54acc22..48c171806a 100644 --- a/src/soc/amd/common/block/pi/amd_late_init.c +++ b/src/soc/amd/common/block/pi/amd_late_init.c @@ -53,6 +53,80 @@ static void transfer_memory_info(TYPE17_DMI_INFO *dmi17, struct dimm_info *dimm) sizeof(dimm->module_part_number)); } +static void print_dimm_info(const struct dimm_info *dimm) +{ + printk(RAM_SPEW, + "CBMEM_ID_MEMINFO:\n" + " dimm_size: %u\n" + " ddr_type: 0x%hx\n" + " ddr_frequency: %hu\n" + " rank_per_dimm: %hhu\n" + " channel_num: %hhu\n" + " dimm_num: %hhu\n" + " bank_locator: %hhu\n" + " mod_id: %hu\n" + " mod_type: 0x%hhx\n" + " bus_width: %hhu\n" + " serial(%zu): %s\n" + " module_part_number(%zu): %s\n", + dimm->dimm_size, + dimm->ddr_type, + dimm->ddr_frequency, + dimm->rank_per_dimm, + dimm->channel_num, + dimm->dimm_num, + dimm->bank_locator, + dimm->mod_id, + dimm->mod_type, + dimm->bus_width, + strlen((char *) dimm->serial), + (char *) dimm->serial, + strlen((char *) dimm->module_part_number), + (char *) dimm->module_part_number + ); +} + +static void print_dmi_info(const TYPE17_DMI_INFO *dmi17) +{ + printk(RAM_SPEW, + "AGESA TYPE 17 DMI INFO:\n" + " Handle: %hu\n" + " TotalWidth: %hu\n" + " DataWidth: %hu\n" + " MemorySize: %hu\n" + " DeviceSet: %hhu\n" + " Speed: %hu\n" + " ManufacturerIdCode: %llu\n" + " Attributes: %hhu\n" + " ExtSize: %u\n" + " ConfigSpeed: %hu\n" + " MemoryType: 0x%x\n" + " FormFactor: 0x%x\n" + " DeviceLocator: %8s\n" + " BankLocator: %10s\n" + " SerialNumber(%zu): %9s\n" + " PartNumber(%zu): %19s\n", + dmi17->Handle, + dmi17->TotalWidth, + dmi17->DataWidth, + dmi17->MemorySize, + dmi17->DeviceSet, + dmi17->Speed, + dmi17->ManufacturerIdCode, + dmi17->Attributes, + dmi17->ExtSize, + dmi17->ConfigSpeed, + dmi17->MemoryType, + dmi17->FormFactor, + dmi17->DeviceLocator, + dmi17->BankLocator, + strlen((char *) dmi17->SerialNumber), + dmi17->SerialNumber, + strlen((char *) dmi17->PartNumber), + dmi17->PartNumber + ); +} + static void prepare_dmi_17(void *unused) { DMI_INFO *DmiTable; @@ -77,6 +151,8 @@ static void prepare_dmi_17(void *unused) dimm->channel_num = i; dimm->dimm_num = j; transfer_memory_info(address, dimm); + print_dmi_info(address); + print_dimm_info(dimm); dimm_cnt++; } }