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mb/google/brya: fix GPP_H13 setting for brya0 and skolas 

The EN_PP3300_SD gpio (GPP_H13) was configured as a no-connect, but
should be configured as an output.

This change configures GPP_H13 on brya0 and skolas to be an output.

BUG=b:261901759
BRANCH=firmware-brya-14505.B
TEST="emerge-brya coreboot chromeos-bootimage" and verify skolas boots.

Change-Id: Ia3f01e877a5fea3af9a6e746523ed395f3af3b8a
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70512
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nick Vaccaro 2022-12-08 14:41:21 -08:00 committed by Felix Held
parent 694ef4431b
commit 80f38227cf
2 changed files with 5 additions and 3 deletions
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4
src/mainboard/google/brya/variants/brya0/gpio.c
View File

@ -114,7 +114,7 @@ static const struct pad_config early_gpio_table_id2[] = {
/* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* H13 : I2C7_SCL ==> EN_PP3300_SD */
PAD_NC(GPP_H13, UP_20K),
PAD_CFG_GPO(GPP_H13, 1, DEEP),
};
/* Early pad configuration in bootblock for board id 4 */
@ -160,7 +160,7 @@ static const struct pad_config early_gpio_table_id4[] = {
/* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* H13 : I2C7_SCL ==> EN_PP3300_SD */
PAD_NC(GPP_H13, UP_20K),
PAD_CFG_GPO(GPP_H13, 1, DEEP),
};
static const struct pad_config romstage_gpio_table[] = {

4
src/mainboard/google/brya/variants/skolas/gpio.c
View File

@ -27,6 +27,8 @@ static const struct pad_config board_id0_1_overrides[] = {
PAD_CFG_GPO(GPP_F20, 0, DEEP),
/* F21 : EXT_PWR_GATE2# ==> WAKE_ON_WWAN_ODL */
PAD_NC(GPP_F21, NONE),
/* H13 : I2C7_SCL ==> EN_PP3300_SD */
PAD_CFG_GPO(GPP_H13, 1, DEEP),
/* H21 : IMGCLKOUT2 ==> WLAN_INT_L */
PAD_CFG_GPI_APIC(GPP_H21, NONE, DEEP, EDGE_SINGLE, NONE),
/* GPD2: LAN_WAKE# ==> NC */
@ -69,7 +71,7 @@ static const struct pad_config early_gpio_table[] = {
/* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* H13 : I2C7_SCL ==> EN_PP3300_SD */
PAD_NC(GPP_H13, UP_20K),
PAD_CFG_GPO(GPP_H13, 1, DEEP),
};
/* Early pad configuration in bootblock for board id 2 */