soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ix

Enable PCH thermal sensor for dynamic thermal shutdown for S0ix state.

BUG=None
BRANCH=None
TEST=Verified Thermal Device (B0: D18: F0) TSPM offset 0x1c [LTT (8:0)]
value is 0xFE.

Change-Id: I50796bcf9e0d5a65cd7ba63fedd932967c4c1ff9
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34522
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/cannonlake/Kconfig

@@ -97,6 +97,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_BLOCK_SMM
 	select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+	select SOC_INTEL_COMMON_BLOCK_THERMAL
 	select SOC_INTEL_COMMON_PCH_BASE
 	select SOC_INTEL_COMMON_NHLT
 	select SOC_INTEL_COMMON_RESET

src/soc/intel/cannonlake/finalize.c

@@ -24,6 +24,7 @@
 #include <intelblocks/lpc_lib.h>
 #include <intelblocks/pcr.h>
 #include <intelblocks/tco.h>
+#include <intelblocks/thermal.h>
 #include <reg_script.h>
 #include <spi-generic.h>
 #include <soc/p2sb.h>
@@ -62,6 +63,16 @@ static void pch_finalize(void)
 	uint8_t reg8;
 
 	tco_lockdown();
+
+	/*
+	 * Set low maximum temp threshold value used for dynamic thermal sensor
+	 * shutdown consideration.
+	 *
+	 * If Dynamic Thermal Shutdown is enabled then PMC logic shuts down the
+	 * thermal sensor when CPU is in a C-state and DTS Temp <= LTT.
+	 */
+	pch_thermal_configuration();
+
 	/*
 	 * Disable ACPI PM timer based on dt policy
 	 *