GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/hatch: Change SD_CD# reset config to PLTRST 

The system should boot fine to OS on pressing power button before the
system enters G3. However, on hatch, we observe that the system waits
for few seconds at "Starting kernel" and then resets, with SD card tray
inserted and SD_CD# pad reset config set to DEEP. Hence configuring SD_CD#
pad reset config to PLTRST.

BUG=b:129933011
TEST=Built and verified on hatch.

Change-Id: Ic4466b96332f095ff39b28d98607e95fc3d12d6a
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Krishna Prasad Bhat 2019-05-14 14:42:10 +05:30 committed by Patrick Georgi
parent 20989630c4
commit 811a51ac67
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -339,7 +339,7 @@ static const struct pad_config gpio_table[] = {
/* G4 : SD_DATA3 */ /* G4 : SD_DATA3 */
PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1), PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
/* G5 : SD_CD# */ /* G5 : SD_CD# */
PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), PAD_CFG_NF(GPP_G5, NONE, PLTRST, NF1),
/* G6 : SD_CLK */ /* G6 : SD_CLK */
PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1), PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1),
/* G7 : SD_WP => NC */ /* G7 : SD_WP => NC */