qemu: copy dsdt tables from SeaBIOS, adapt for coreboot and enable acpi
First copy over from SeaBIOS git repo, then adapt for coreboot: Disable cpu/pci hotplug bits. Disable dynamic pci window. Both depend on stuff in the SSDT tables created by SeaBIOS. Bits are left in, but deactivated via #if 0, so it's easier to see the differences when diffing the coreboot tables with the SeaBIOS tables. Adapt dsdt DefinitionBlock. Enable acpi table generation in acpi_tables.c. With this patch linux boots successfully with ACPI enabled. It's not bug-free though. Missing cpu detection leads to funky messages like this one: weird, boot CPU (#0) not listed by the BIOS. and SMP most likely wouldn't work either. Change-Id: Ic3803a6f1ef6d54c11cc4ca3844d3032a374ae6b Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/3342 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
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@ -0,0 +1,78 @@
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/****************************************************************
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* CPU hotplug
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****************************************************************/
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Scope(\_SB) {
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/* Objects filled in by run-time generated SSDT */
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External(NTFY, MethodObj)
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External(CPON, PkgObj)
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/* Methods called by run-time generated SSDT Processor objects */
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Method(CPMA, 1, NotSerialized) {
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// _MAT method - create an madt apic buffer
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// Arg0 = Processor ID = Local APIC ID
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// Local0 = CPON flag for this cpu
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Store(DerefOf(Index(CPON, Arg0)), Local0)
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// Local1 = Buffer (in madt apic form) to return
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Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
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// Update the processor id, lapic id, and enable/disable status
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Store(Arg0, Index(Local1, 2))
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Store(Arg0, Index(Local1, 3))
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Store(Local0, Index(Local1, 4))
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Return (Local1)
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}
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Method(CPST, 1, NotSerialized) {
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// _STA method - return ON status of cpu
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// Arg0 = Processor ID = Local APIC ID
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// Local0 = CPON flag for this cpu
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Store(DerefOf(Index(CPON, Arg0)), Local0)
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If (Local0) {
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Return (0xF)
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} Else {
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Return (0x0)
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}
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}
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Method(CPEJ, 2, NotSerialized) {
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// _EJ0 method - eject callback
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Sleep(200)
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}
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/* CPU hotplug notify method */
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OperationRegion(PRST, SystemIO, 0xaf00, 32)
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Field(PRST, ByteAcc, NoLock, Preserve) {
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PRS, 256
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}
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Method(PRSC, 0) {
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// Local5 = active cpu bitmap
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Store(PRS, Local5)
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// Local2 = last read byte from bitmap
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Store(Zero, Local2)
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// Local0 = Processor ID / APIC ID iterator
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Store(Zero, Local0)
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While (LLess(Local0, SizeOf(CPON))) {
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// Local1 = CPON flag for this cpu
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Store(DerefOf(Index(CPON, Local0)), Local1)
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If (And(Local0, 0x07)) {
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// Shift down previously read bitmap byte
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ShiftRight(Local2, 1, Local2)
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} Else {
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// Read next byte from cpu bitmap
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Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2)
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}
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// Local3 = active state for this cpu
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Store(And(Local2, 1), Local3)
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If (LNotEqual(Local1, Local3)) {
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// State change - update CPON with new state
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Store(Local3, Index(CPON, Local0))
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// Do CPU notify
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If (LEqual(Local3, 1)) {
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NTFY(Local0, 1)
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} Else {
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NTFY(Local0, 3)
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}
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}
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Increment(Local0)
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}
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}
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}
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/****************************************************************
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* Debugging
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****************************************************************/
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Scope(\) {
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/* Debug Output */
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OperationRegion(DBG, SystemIO, 0x0402, 0x01)
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Field(DBG, ByteAcc, NoLock, Preserve) {
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DBGB, 8,
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}
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/* Debug method - use this method to send output to the QEMU
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* BIOS debug port. This method handles strings, integers,
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* and buffers. For example: DBUG("abc") DBUG(0x123) */
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Method(DBUG, 1) {
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ToHexString(Arg0, Local0)
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ToBuffer(Local0, Local0)
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Subtract(SizeOf(Local0), 1, Local1)
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Store(Zero, Local2)
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While (LLess(Local2, Local1)) {
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Store(DerefOf(Index(Local0, Local2)), DBGB)
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Increment(Local2)
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}
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Store(0x0A, DBGB)
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}
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}
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@ -0,0 +1,36 @@
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/****************************************************************
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* HPET
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****************************************************************/
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Scope(\_SB) {
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Device(HPET) {
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Name(_HID, EISAID("PNP0103"))
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Name(_UID, 0)
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OperationRegion(HPTM, SystemMemory, 0xFED00000, 0x400)
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Field(HPTM, DWordAcc, Lock, Preserve) {
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VEND, 32,
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PRD, 32,
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}
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Method(_STA, 0, NotSerialized) {
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Store(VEND, Local0)
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Store(PRD, Local1)
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ShiftRight(Local0, 16, Local0)
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If (LOr(LEqual(Local0, 0), LEqual(Local0, 0xffff))) {
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Return (0x0)
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}
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If (LOr(LEqual(Local1, 0), LGreater(Local1, 100000000))) {
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Return (0x0)
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}
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Return (0x0F)
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}
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Name(_CRS, ResourceTemplate() {
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#if 0 /* This makes WinXP BSOD for not yet figured reasons. */
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IRQNoFlags() {2, 8}
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#endif
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Memory32Fixed(ReadOnly,
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0xFED00000, // Address Base
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0x00000400, // Address Length
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)
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})
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}
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}
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@ -0,0 +1,102 @@
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/* Common legacy ISA style devices. */
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Scope(\_SB.PCI0.ISA) {
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Device(RTC) {
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Name(_HID, EisaId("PNP0B00"))
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Name(_CRS, ResourceTemplate() {
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IO(Decode16, 0x0070, 0x0070, 0x10, 0x02)
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IRQNoFlags() { 8 }
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IO(Decode16, 0x0072, 0x0072, 0x02, 0x06)
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})
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}
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Device(KBD) {
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Name(_HID, EisaId("PNP0303"))
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Method(_STA, 0, NotSerialized) {
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Return (0x0f)
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}
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Name(_CRS, ResourceTemplate() {
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IO(Decode16, 0x0060, 0x0060, 0x01, 0x01)
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IO(Decode16, 0x0064, 0x0064, 0x01, 0x01)
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IRQNoFlags() { 1 }
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})
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}
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Device(MOU) {
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Name(_HID, EisaId("PNP0F13"))
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Method(_STA, 0, NotSerialized) {
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Return (0x0f)
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}
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Name(_CRS, ResourceTemplate() {
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IRQNoFlags() { 12 }
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})
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}
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Device(FDC0) {
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Name(_HID, EisaId("PNP0700"))
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Method(_STA, 0, NotSerialized) {
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Store(FDEN, Local0)
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If (LEqual(Local0, 0)) {
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Return (0x00)
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} Else {
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Return (0x0F)
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}
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}
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Name(_CRS, ResourceTemplate() {
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IO(Decode16, 0x03F2, 0x03F2, 0x00, 0x04)
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IO(Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
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IRQNoFlags() { 6 }
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DMA(Compatibility, NotBusMaster, Transfer8) { 2 }
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})
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}
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Device(LPT) {
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Name(_HID, EisaId("PNP0400"))
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Method(_STA, 0, NotSerialized) {
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Store(LPEN, Local0)
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If (LEqual(Local0, 0)) {
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Return (0x00)
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} Else {
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Return (0x0F)
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}
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}
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Name(_CRS, ResourceTemplate() {
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IO(Decode16, 0x0378, 0x0378, 0x08, 0x08)
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IRQNoFlags() { 7 }
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})
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}
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Device(COM1) {
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Name(_HID, EisaId("PNP0501"))
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Name(_UID, 0x01)
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Method(_STA, 0, NotSerialized) {
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Store(CAEN, Local0)
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If (LEqual(Local0, 0)) {
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Return (0x00)
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} Else {
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Return (0x0F)
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}
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}
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Name(_CRS, ResourceTemplate() {
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IO(Decode16, 0x03F8, 0x03F8, 0x00, 0x08)
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IRQNoFlags() { 4 }
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})
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}
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Device(COM2) {
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Name(_HID, EisaId("PNP0501"))
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Name(_UID, 0x02)
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Method(_STA, 0, NotSerialized) {
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Store(CBEN, Local0)
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If (LEqual(Local0, 0)) {
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Return (0x00)
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} Else {
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Return (0x0F)
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}
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}
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Name(_CRS, ResourceTemplate() {
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IO(Decode16, 0x02F8, 0x02F8, 0x00, 0x08)
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IRQNoFlags() { 3 }
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})
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}
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}
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@ -0,0 +1,94 @@
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/* PCI CRS (current resources) definition. */
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Scope(\_SB.PCI0) {
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Name(CRES, ResourceTemplate() {
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WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
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0x0000, // Address Space Granularity
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0x0000, // Address Range Minimum
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0x00FF, // Address Range Maximum
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0x0000, // Address Translation Offset
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0x0100, // Address Length
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,, )
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IO(Decode16,
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0x0CF8, // Address Range Minimum
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0x0CF8, // Address Range Maximum
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0x01, // Address Alignment
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0x08, // Address Length
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)
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WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, // Address Space Granularity
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0x0000, // Address Range Minimum
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0x0CF7, // Address Range Maximum
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0x0000, // Address Translation Offset
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0x0CF8, // Address Length
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,, , TypeStatic)
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WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, // Address Space Granularity
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0x0D00, // Address Range Minimum
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0xFFFF, // Address Range Maximum
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0x0000, // Address Translation Offset
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0xF300, // Address Length
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,, , TypeStatic)
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
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0x00000000, // Address Space Granularity
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0x000A0000, // Address Range Minimum
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0x000BFFFF, // Address Range Maximum
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0x00000000, // Address Translation Offset
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0x00020000, // Address Length
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,, , AddressRangeMemory, TypeStatic)
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
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0x00000000, // Address Space Granularity
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0xE0000000, // Address Range Minimum
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0xFEBFFFFF, // Address Range Maximum
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0x00000000, // Address Translation Offset
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0x1EC00000, // Address Length
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,, PW32, AddressRangeMemory, TypeStatic)
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})
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Name(CR64, ResourceTemplate() {
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QWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
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0x00000000, // Address Space Granularity
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0x8000000000, // Address Range Minimum
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0xFFFFFFFFFF, // Address Range Maximum
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0x00000000, // Address Translation Offset
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0x8000000000, // Address Length
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,, PW64, AddressRangeMemory, TypeStatic)
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})
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Method(_CRS, 0) {
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#if 0
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/* Fields provided by dynamically created ssdt */
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External(P0S, IntObj)
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External(P0E, IntObj)
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External(P1V, IntObj)
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External(P1S, BuffObj)
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External(P1E, BuffObj)
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External(P1L, BuffObj)
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/* fixup 32bit pci io window */
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CreateDWordField(CRES, \_SB.PCI0.PW32._MIN, PS32)
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CreateDWordField(CRES, \_SB.PCI0.PW32._MAX, PE32)
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CreateDWordField(CRES, \_SB.PCI0.PW32._LEN, PL32)
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Store(P0S, PS32)
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Store(P0E, PE32)
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Store(Add(Subtract(P0E, P0S), 1), PL32)
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If (LEqual(P1V, Zero)) {
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Return (CRES)
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}
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/* fixup 64bit pci io window */
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CreateQWordField(CR64, \_SB.PCI0.PW64._MIN, PS64)
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CreateQWordField(CR64, \_SB.PCI0.PW64._MAX, PE64)
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CreateQWordField(CR64, \_SB.PCI0.PW64._LEN, PL64)
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Store(P1S, PS64)
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Store(P1E, PE64)
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Store(P1L, PL64)
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/* add window and return result */
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ConcatenateResTemplate(CRES, CR64, Local0)
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Return (Local0)
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#else
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Return (CRES)
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#endif
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}
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}
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@ -73,7 +73,6 @@ unsigned long acpi_fill_srat(unsigned long current)
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#define ALIGN_CURRENT current = (ALIGN(current, 16))
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unsigned long write_acpi_tables(unsigned long start)
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{
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#ifdef ACPI
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unsigned long current;
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acpi_rsdp_t *rsdp;
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acpi_rsdt_t *rsdt;
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printk(BIOS_DEBUG, "current = %lx\n", current);
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printk(BIOS_INFO, "ACPI: done.\n");
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return current;
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#else
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return start;
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#endif
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}
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