diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig index bbbc617d92..0ae425e2a3 100644 --- a/src/mainboard/google/veyron/Kconfig +++ b/src/mainboard/google/veyron/Kconfig @@ -44,6 +44,10 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 1 +config BOOT_MEDIA_SPI_BUS + int + default 2 + config DRAM_DMA_START hex default 0x10000000 diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig index 0fadefd283..359ce2f57d 100644 --- a/src/soc/rockchip/rk3288/Kconfig +++ b/src/soc/rockchip/rk3288/Kconfig @@ -54,6 +54,10 @@ config BOOTBLOCK_CPU_INIT # 0xFF71_3000 CBFS mapping cache (20K) # 0xFF71_7FFF End of iRAM. +config SYS_SRAM_BASE + hex "SRAM base address" + default 0xFF700000 + config SYS_SDRAM_BASE hex "SDRAM base address" default 0x00000000 diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index e0f32242a5..7d5b3a5767 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -17,6 +17,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +IDBTOOL = util/rockchip/make_idb.py + #bootblock-y += bootblock.c bootblock-y += cbmem.c bootblock-y += timer.c @@ -43,3 +45,11 @@ ramstage-y += clock.c ramstage-y += spi.c ramstage-y += media.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c + +$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf + cp $< $@ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf "Generating: $(subst $(obj)/,,$(@))\n" + @mkdir -p $(dir $@) + @$(IDBTOOL) --from=$< --to=$@ --enable-align diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c index 04afae5529..76a91d234d 100644 --- a/src/soc/rockchip/rk3288/bootblock.c +++ b/src/soc/rockchip/rk3288/bootblock.c @@ -19,12 +19,20 @@ #include #include +#include #include #include "timer.h" #include "clock.h" +#include "grf.h" +#include "spi.h" static void bootblock_cpu_init(void) { + writel(IOMUX_UART2, &rk3288_grf->iomux_uart2); + writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk); + writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx); rk3288_init_timer(); + console_init(); rkclk_init(); + rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS); } diff --git a/util/rockchip/LICENSE b/util/rockchip/LICENSE new file mode 100644 index 0000000000..cb4d35b256 --- /dev/null +++ b/util/rockchip/LICENSE @@ -0,0 +1,25 @@ +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are +// met: +// +// * Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above +// copyright notice, this list of conditions and the following disclaimer +// in the documentation and/or other materials provided with the +// distribution. +// * Neither the name of Google Inc. nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/util/rockchip/make_idb.py b/util/rockchip/make_idb.py new file mode 100755 index 0000000000..e95f5c2fd7 --- /dev/null +++ b/util/rockchip/make_idb.py @@ -0,0 +1,124 @@ +#!/usr/bin/env python +# Copyright (c) 2014 Google Inc. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +import struct +import sys +from io import SEEK_SET, SEEK_END + +class IDBTool: + def __init__(self): + print "Initialize IDBTool" + + def p_rc4(self, buf, length): + key = (124,78,3,4,85,5,9,7,45,44,123,56,23,13,23,17) + K = key * 16 + S = [i for i in range(256)] + + j = 0 + for i in range(256): + j = (j + S[i] + K[i]) % 256 + temp = S[i]; S[i] = S[j]; S[j] = temp; + + i = j = k = 0 + for x in range(length): + i = (i+1) % 256 + j = (j + S[i]) % 256 + temp = S[i]; S[i] = S[j]; S[j] = temp + k = (S[i] + S[j]) % 256 + buf[x] = struct.pack('B', ord(buf[x]) ^ S[k]) + + def makeIDB(self, from_file, to_file, rc4_flag = False, align_flag = False): + try: + fin = open(from_file, 'rb') + except: + sys.exit("Failed to open file : " + from_file) + + try: + fin.seek(0, SEEK_END) + if (fin.tell() > 4 * 1024 * 1024): + sys.exit("Input file is more than 4MB") + fin.seek(0) + data = fin.read() + finally: + fin.close() + + data_len = len(data) + SECTOR_SIZE = 512 + PAGE_ALIGN = 4 + sectors = (data_len + 4 - 1) / SECTOR_SIZE + 1 + pages = (sectors - 1) / PAGE_ALIGN + 1 + sectors = pages * PAGE_ALIGN; + + buf = [B'\0'] * sectors * SECTOR_SIZE + buf[:4] = "RK32" + buf[4 : 4+data_len] = data + + idblock = [B'\0'] * 4 * SECTOR_SIZE + blank = [B'\0'] * 4 * SECTOR_SIZE + idblock[:4] = ['\x55', '\xAA', '\xF0', '\x0F'] + + if (not rc4_flag): + idblock[8:12] = struct.pack("