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soc/amd/*/acpi: assign proper boolean values in get_pstate_core_freq 

Assign true/false instead of 1/0 to the valid_freq_divisor bool variable
in get_pstate_core_freq.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I92d0eb029c55f80a2027ff6d404c63ed84282750
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Felix Held 2023-03-21 16:21:43 +01:00
parent 907b6f54ef
commit 81943646e3
5 changed files with 15 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/soc/amd/cezanne/acpi.c
View File

@ -114,13 +114,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def)
} else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN)
&& (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) {
/* Allow 1/8 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX)
&& (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) {
/* Only allow 1/4 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else {
valid_freq_divisor = 0;
valid_freq_divisor = false;
}
if (valid_freq_divisor) {

6
src/soc/amd/glinda/acpi.c
View File

@ -115,13 +115,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def)
} else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN)
&& (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) {
/* Allow 1/8 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX)
&& (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) {
/* Only allow 1/4 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else {
valid_freq_divisor = 0;
valid_freq_divisor = false;
}
if (valid_freq_divisor) {

6
src/soc/amd/mendocino/acpi.c
View File

@ -116,13 +116,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def)
} else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN)
&& (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) {
/* Allow 1/8 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX)
&& (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) {
/* Only allow 1/4 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else {
valid_freq_divisor = 0;
valid_freq_divisor = false;
}
if (valid_freq_divisor) {

6
src/soc/amd/phoenix/acpi.c
View File

@ -115,13 +115,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def)
} else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN)
&& (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) {
/* Allow 1/8 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX)
&& (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) {
/* Only allow 1/4 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else {
valid_freq_divisor = 0;
valid_freq_divisor = false;
}
if (valid_freq_divisor) {

6
src/soc/amd/picasso/acpi.c
View File

@ -118,13 +118,13 @@ uint32_t get_pstate_core_freq(msr_t pstate_def)
} else if ((core_freq_div >= PSTATE_DEF_LO_FREQ_DIV_MIN)
&& (core_freq_div <= PSTATE_DEF_LO_EIGHTH_STEP_MAX)) {
/* Allow 1/8 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else if ((core_freq_div > PSTATE_DEF_LO_EIGHTH_STEP_MAX)
&& (core_freq_div <= PSTATE_DEF_LO_FREQ_DIV_MAX) && !(core_freq_div & 0x1)) {
/* Only allow 1/4 integer steps for this range */
valid_freq_divisor = 1;
valid_freq_divisor = true;
} else {
valid_freq_divisor = 0;
valid_freq_divisor = false;
}
if (valid_freq_divisor) {