Whitespace fixes (trivial).
Signed-off-by: Corey Osgood <corey_osgood@verizon.net> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Corey Osgood
Uwe Hermann
parent
cbe4e1f3d2
commit
819f5810b6
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@ -149,76 +149,76 @@ end
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# based on sample config for tyan/s2735
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chip northbridge/intel/e7501
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device pci_domain 0 on
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device pci 0.0 on end # Chipset host controller
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device pci 0.1 on end # Host RASUM controller
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device pci 2.0 on # Hub interface B
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chip southbridge/intel/i82870 # P64H2
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device pci 1c.0 on end # IOAPIC - bus B
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device pci 1d.0 on end # Hub to PCI-B bridge
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device pci 1e.0 on end # IOAPIC - bus A
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device pci 1f.0 on end # Hub to PCI-A bridge
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end
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device pci 0.0 on end # Chipset host controller
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device pci 0.1 on end # Host RASUM controller
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device pci 2.0 on # Hub interface B
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chip southbridge/intel/i82870 # P64H2
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device pci 1c.0 on end # IOAPIC - bus B
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device pci 1d.0 on end # Hub to PCI-B bridge
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device pci 1e.0 on end # IOAPIC - bus A
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device pci 1f.0 on end # Hub to PCI-A bridge
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end
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end
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device pci 3.0 off end # Hub interface C (82808AA connector - disable for now)
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device pci 4.0 on # Hub interface D
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chip southbridge/intel/i82870 # P64H2
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device pci 1c.0 on end # IOAPIC - bus B
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device pci 1d.0 on end # Hub to PCI-B bridge
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device pci 1e.0 on end # IOAPIC - bus A
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device pci 1f.0 on end # Hub to PCI-A bridge
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end
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device pci 3.0 off end # Hub interface C (82808AA connector - disable for now)
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device pci 4.0 on # Hub interface D
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chip southbridge/intel/i82870 # P64H2
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device pci 1c.0 on end # IOAPIC - bus B
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device pci 1d.0 on end # Hub to PCI-B bridge
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device pci 1e.0 on end # IOAPIC - bus A
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device pci 1f.0 on end # Hub to PCI-A bridge
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end
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end
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device pci 6.0 on end # E7501 Power management registers? (undocumented)
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chip southbridge/intel/i82801ca
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device pci 1d.0 off end # USB (might not work, Southbridge code needs looking at)
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device pci 1d.1 off end # USB (not populated)
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device pci 1d.2 off end # USB (not populated)
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device pci 1e.0 on # Hub to PCI bridge
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chip drivers/pci/onboard # VGA ROM
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device pci 0.0 on end
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register "rom_address" = "_vgarom_start"
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end
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end
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device pci 1f.0 on # LPC bridge
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device pci 6.0 on end # E7501 Power management registers? (undocumented)
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chip southbridge/intel/i82801ca
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device pci 1d.0 off end # USB (might not work, Southbridge code needs looking at)
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device pci 1d.1 off end # USB (not populated)
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device pci 1d.2 off end # USB (not populated)
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device pci 1e.0 on # Hub to PCI bridge
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chip drivers/pci/onboard # VGA ROM
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device pci 0.0 on end
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register "rom_address" = "_vgarom_start"
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end
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end
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device pci 1f.0 on # LPC bridge
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chip superio/smsc/lpc47b272
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device pnp 2e.0 off # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.3 off # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.4 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.5 off # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.7 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1 # Keyboard interrupt
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irq 0x72 = 12 # Mouse interrupt
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end
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device pnp 2e.a off end # ACPI
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end
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end
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device pci 1f.1 on end # IDE
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device pci 1f.3 on end # SMBus
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device pci 1f.5 off end # AC97 Audio
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device pci 1f.6 off end # AC97 Modem
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device pnp 2e.0 off # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.3 off # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.4 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.5 off # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.7 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1 # Keyboard interrupt
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irq 0x72 = 12 # Mouse interrupt
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end
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device pnp 2e.a off end # ACPI
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end
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end
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device pci 1f.1 on end # IDE
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device pci 1f.3 on end # SMBus
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device pci 1f.5 off end # AC97 Audio
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device pci 1f.6 off end # AC97 Modem
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end # SB
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end # PCI_DOMAIN
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device apic_cluster 0 on
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chip cpu/intel/socket_mPGA604_533Mhz
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device apic 0 on end
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end
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chip cpu/intel/socket_mPGA604_533Mhz
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device apic 6 on end
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end
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end
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device apic_cluster 0 on
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chip cpu/intel/socket_mPGA604_533Mhz
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device apic 0 on end
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end
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chip cpu/intel/socket_mPGA604_533Mhz
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device apic 6 on end
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end
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end
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end
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