intel/i945: Factor out ram init time stamps

Instead of having the code for the RAM init time stamps in each
mainboard’s `romstage.c`, factor it out to the northbridge code, done in
commit 771328f7 (intel/i945: add timestamps in romstage).

Change-Id: Ibb699a1fea2f0b1f3c6564d401542d2fb3249f5a
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/17994
Reviewed-by: Elyes HAOUAS <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Paul Menzel 2016-12-29 22:46:12 +01:00 committed by Patrick Georgi
parent d2b9ec1362
commit 81dd52b7eb
11 changed files with 0 additions and 22 deletions

View File

@ -273,9 +273,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, spd_addrmap);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -235,9 +235,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : boot_mode, NULL);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -285,9 +285,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, NULL);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -189,9 +189,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : boot_mode, NULL);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -239,9 +239,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, NULL);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -166,9 +166,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : boot_mode, NULL);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -335,9 +335,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, NULL);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -223,9 +223,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, spd_addrmap);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -225,9 +225,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, spd_addrmap);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -223,9 +223,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, spd_addrmap);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();

View File

@ -258,9 +258,7 @@ void mainboard_romstage_entry(unsigned long bist)
dump_spd_registers();
#endif
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : 0, NULL);
timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();