GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

x86/mtrr: Enable MTRR's before enabling caching 

Fix up the following commit by enabling the MTRR's before enabling caching.

7756fe7 x86: Minimize work done with the caches disabled in mtrr functions.

Also fix two typos in comments.

Change-Id: If751b815f9dab781fc38c898cf692f0940c57695
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6969
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Isaac Christensen 2014-09-24 14:59:32 -06:00
parent d2f3aa91e0
commit 81f90c58d2
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/cpu/x86/mtrr/mtrr.c
View File

@ -51,8 +51,8 @@
#define OS_MTRRS 2
#define MTRRS (BIOS_MTRRS + OS_MTRRS)
/*
* Static storage size for variable MTRRs. Its sized sufficiently large to
* handle different types of CPUs. Empiricially, 16 variable MTRRs has not
* Static storage size for variable MTRRs. It's sized sufficiently large to
* handle different types of CPUs. Empirically, 16 variable MTRRs has not
* yet been observed.
*/
#define NUM_MTRR_STATIC_STORAGE 16
@ -769,7 +769,7 @@ static void commit_var_mtrrs(const struct var_mtrr_solution *sol)
{
int i;
/* Write out the variable MTTRs. */
/* Write out the variable MTRRs. */
disable_cache();
for (i = 0; i < sol->num_used; i++) {
wrmsr(MTRRphysBase_MSR(i), sol->regs[i].base);
@ -778,6 +778,7 @@ static void commit_var_mtrrs(const struct var_mtrr_solution *sol)
/* Clear the ones that are unused. */
for (; i < total_mtrrs; i++)
clear_var_mtrr(i);
enable_var_mtrr(sol->mtrr_default_type);
enable_cache();
}
@ -800,7 +801,6 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb)
}
commit_var_mtrrs(sol);
enable_var_mtrr(sol->mtrr_default_type);
}
void x86_setup_mtrrs(void)