soc/intel/common: add possiblity to override GPE0 to acpi_fill_soc_wake
Currently, only the PM1_STS mask gets passed to `acpi_fill_soc_wake`. To be able to override the GPE0_STS mask as well, also pass that one. To accomplish that, pointers to the variables are passed now. Change-Id: If9f28cf054ae8b602c0587e4dd4a13a4aba810c7 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58071 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -192,10 +192,9 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
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}
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__weak
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uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en,
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void acpi_fill_soc_wake(uint32_t *pm1_en, uint32_t *gpe0_en,
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const struct chipset_power_state *ps)
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{
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return generic_pm1_en;
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}
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/*
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@ -210,6 +209,7 @@ uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en,
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int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0)
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{
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static uint32_t gpe0_sts[GPE0_REG_MAX];
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uint32_t gpe0_en[GPE0_REG_MAX];
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uint32_t pm1_en;
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int i;
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@ -220,14 +220,16 @@ int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint
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pm1_en = ps->pm1_en;
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pm1_en |= WAK_STS | PWRBTN_EN;
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pm1_en = acpi_fill_soc_wake(pm1_en, ps);
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memcpy(gpe0_en, ps->gpe0_en, sizeof(gpe0_en));
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acpi_fill_soc_wake(&pm1_en, gpe0_en, ps);
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*pm1 = ps->pm1_sts & pm1_en;
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/* Mask off GPE0 status bits that are not enabled */
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*gpe0 = &gpe0_sts[0];
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for (i = 0; i < GPE0_REG_MAX; i++)
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gpe0_sts[i] = ps->gpe0_sts[i] & ps->gpe0_en[i];
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gpe0_sts[i] = ps->gpe0_sts[i] & gpe0_en[i];
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return GPE0_REG_MAX;
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}
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@ -6,6 +6,7 @@
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#include <acpi/acpi.h>
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#include <device/device.h>
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#include <intelblocks/cpulib.h>
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#include <soc/pm.h>
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#include <stdint.h>
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/* Forward declare the power state struct here */
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@ -47,9 +48,8 @@ acpi_tstate_t *soc_get_tss_table(int *entries);
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/*
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* Chipset specific quirks for the wake enable bits.
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* Returns wake events for the soc.
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*/
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uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en,
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void acpi_fill_soc_wake(uint32_t *pm1_en, uint32_t *gpe0_en,
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const struct chipset_power_state *ps);
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/* Chipset specific settings for filling up dmar table */
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