soc/intel/meteorlake: Disable ACPI PM timer using IOE.PMC
This patch disables the ACPI PM timer which is necessary for XTAL OSC shutdown. Also, disabling ACPI PM timer switches off TCO. BUG=b:274744845 TEST=Able to boot and verify S0ix is working even with EC reset and cold boot scenarios. w/o this cl: > iotools mmio_read32 0xfe4018fc 0x0 w/ this cl: > iotools mmio_read32 0xfe4018fc 0x2 Change-Id: Ibb6e145f67dba7270e0a322ef414bf1cb09c5eda Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75822 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
parent
bf8f57d618
commit
82226f6e5c
|
@ -25,6 +25,9 @@
|
|||
|
||||
#define HPET_BASE_ADDRESS 0xfed00000
|
||||
|
||||
#define IOE_PWRM_BASE_ADDRESS 0xfe400000
|
||||
#define IOE_PWRM_BASE_SIZE 0x10000
|
||||
|
||||
#define PCH_PWRM_BASE_ADDRESS 0xfe000000
|
||||
#define PCH_PWRM_BASE_SIZE 0x10000
|
||||
|
||||
|
|
|
@ -150,6 +150,9 @@ struct chipset_power_state {
|
|||
/* Get base address PMC memory mapped registers. */
|
||||
uint8_t *pmc_mmio_regs(void);
|
||||
|
||||
/* Get base address IOE.PMC memory mapped registers. */
|
||||
uint8_t *ioe_pmc_mmio_regs(void);
|
||||
|
||||
/* Get base address of TCO I/O registers. */
|
||||
uint16_t smbus_tco_regs(void);
|
||||
|
||||
|
|
|
@ -157,8 +157,10 @@ static void soc_pmc_init(struct device *dev)
|
|||
* Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
|
||||
* Disabling ACPI PM timer also switches off TCO
|
||||
*/
|
||||
if (!CONFIG(USE_PM_ACPI_TIMER))
|
||||
if (!CONFIG(USE_PM_ACPI_TIMER)) {
|
||||
setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS);
|
||||
setbits8(ioe_pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS);
|
||||
}
|
||||
}
|
||||
|
||||
static void pm1_enable_pwrbtn_smi(void *unused)
|
||||
|
|
|
@ -134,6 +134,11 @@ uint8_t *pmc_mmio_regs(void)
|
|||
return (void *)(uintptr_t)PCH_PWRM_BASE_ADDRESS;
|
||||
}
|
||||
|
||||
uint8_t *ioe_pmc_mmio_regs(void)
|
||||
{
|
||||
return (void *)(uintptr_t)IOE_PWRM_BASE_ADDRESS;
|
||||
}
|
||||
|
||||
uintptr_t soc_read_pmc_base(void)
|
||||
{
|
||||
return (uintptr_t)pmc_mmio_regs();
|
||||
|
|
Loading…
Reference in New Issue