diff --git a/src/cpu/allwinner/a10/gpio.h b/src/cpu/allwinner/a10/gpio.h
index f285451b17..709f74b641 100644
--- a/src/cpu/allwinner/a10/gpio.h
+++ b/src/cpu/allwinner/a10/gpio.h
@@ -46,6 +46,7 @@ struct a10_gpio {
 	u32 sdr_pad_pul;
 } __attribute__ ((packed));
 
-void gpio_set_func(u8 port, u8 pin, u8 pad_func);
+void gpio_set_pin_func(u8 port, u8 pin, u8 pad_func);
+void gpio_set_multipin_func(u8 port, u32 pin_mask, u8 pad_func);
 
 #endif				/* __CPU_ALLWINNER_A10_PINMUX_H */
diff --git a/src/cpu/allwinner/a10/pinmux.c b/src/cpu/allwinner/a10/pinmux.c
index 2525de58af..de87440d8f 100644
--- a/src/cpu/allwinner/a10/pinmux.c
+++ b/src/cpu/allwinner/a10/pinmux.c
@@ -11,7 +11,14 @@
 
 static struct a10_gpio *const gpio = (void *)GPIO_BASE;
 
-void gpio_set_func(u8 port, u8 pin, u8 pad_func)
+/**
+ * \brief Set the pad function of a single pin
+ *
+ * @param[in] port GPIO port of the pin (GPA -> GPS)
+ * @param[in] pin the pin number in the given port (1 -> 31)
+ * @param[in] pad_func The peripheral function to which to connect this pin
+ */
+void gpio_set_pin_func(u8 port, u8 pin, u8 pad_func)
 {
 	u8 reg, bit;
 	u32 reg32;
@@ -28,3 +35,45 @@ void gpio_set_func(u8 port, u8 pin, u8 pad_func)
 	reg32 |= (pad_func & 0xf) << bit;
 	write32(reg32, &gpio->port[port].cfg[reg]);
 }
+
+/**
+ * \brief Set the pad function of a group of pins
+ *
+ * Multiplex a group of pins to the same pad function. This is useful for
+ * peripherals that use the same function number for several pins. This function
+ * allows those pins to be set with a single call.
+ *
+ * Example:
+ *	gpio_set_multipin_func(GPB, (1 << 23) | (1 << 22), 2);
+ *
+ * @param[in] port GPIO port of the pin (GPA -> GPS)
+ * @param[in] pin_mask 32-bit mask indicating which pins to re-multiplex. For
+ *			each set bit, the corresponding pin will be multiplexed.
+ * @param[in] pad_func The peripheral function to which to connect the pins
+ */
+void gpio_set_multipin_func(u8 port, u32 pin_mask, u8 pad_func)
+{
+	int j;
+	u8 reg, bit;
+	u32 reg32, mask_offset;
+
+	if ((port > GPS))
+		return;
+
+	for (reg = 0; reg < 4; reg++) {
+		mask_offset = 8 * reg;
+		/* Don't run the inner loop if we're not touching any pins */
+		if (!(pin_mask & (0xff << mask_offset)))
+			continue;
+
+		reg32 = read32(&gpio->port[port].cfg[reg]);
+		for (j = 0; j < 8; j++) {
+			if (!(pin_mask & (1 << (j + mask_offset))))
+				continue;
+			bit = j * 4;
+			reg32 &= ~(0xf << bit);
+			reg32 |= (pad_func & 0xf) << bit;
+		}
+		write32(reg32, &gpio->port[port].cfg[reg]);
+	}
+}
diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c
index 6e8b751c73..a91391c7a0 100644
--- a/src/mainboard/cubietech/cubieboard/bootblock.c
+++ b/src/mainboard/cubietech/cubieboard/bootblock.c
@@ -18,8 +18,8 @@
 	 | AHB_DIV_1			\
 	 | AXI_DIV_1
 
-#define GPB22_UART0_TX_FUNC		2
-#define GPB23_UART0_RX_FUNC		2
+#define GPB_UART0_FUNC			2
+#define GPB_UART0_PINS			((1 << 22) | (1 << 23))
 
 static void cubieboard_set_sys_clock(void)
 {
@@ -57,8 +57,7 @@ static void cubieboard_setup_clocks(void)
 static void cubieboard_setup_gpios(void)
 {
 	/* Mux UART pins */
-	gpio_set_func(GPB, 22, GPB22_UART0_TX_FUNC);
-	gpio_set_func(GPB, 23, GPB23_UART0_RX_FUNC);
+	gpio_set_multipin_func(GPB, GPB_UART0_PINS, GPB_UART0_FUNC);
 }
 
 static void cubieboard_enable_uart(void)