GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/cezanne/Makefile: move setting of PSP soft fuse bit 6 

The PSP soft fuse bit 6 doesn't do what the comment above it says. See
NDA document #55758 for details.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic84cf6e1eee30af92cd700dc4bf78290143bf88b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51040
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2021-02-19 14:52:34 +01:00
parent 5d7c3a4f01
commit 8240cc33ec
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/cezanne/Makefile.inc
View File

@ -102,10 +102,10 @@ PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | a
PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
# type = 0xb - See #55758 (NDA) for bit definitions.
PSP_SOFTFUSE_BITS += 28
PSP_SOFTFUSE_BITS += 28 6
#hardcode post code to eSPI
PSP_SOFTFUSE_BITS += 15 6
PSP_SOFTFUSE_BITS += 15
# Helper function to return a value with given bit set
set-bit=$(call int-shift-left, 1 $(call _toint,$1))