asrock/e350m1: Include ASL for PS/2 controller

On the ASRock E350M1, with Linux 4.10 after resuming from S3, the PS/2
keyboard does not work. Adding the ASL code, fixes this.

The Linux messages change like below.

Before (equivalent to `i8042.nopnp`):

```
kernel: i8042: PNP: No PS/2 controller found.
kernel: i8042: Probing ports directly.
kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
kernel: serio: i8042 AUX port at 0x60,0x64 irq 12
kernel: mousedev: PS/2 mouse device common for all mice
```

After:

```
kernel: i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
kernel: i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
kernel: mousedev: PS/2 mouse device common for all mice
```

Change-Id: I0a06311860398cac9cf1a077e3aba75da779f45d
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/18574
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Paul Menzel 2017-03-04 10:02:24 +01:00 committed by Martin Roth
parent 4dddda294f
commit 824416078e
2 changed files with 16 additions and 0 deletions

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@ -0,0 +1,14 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <drivers/pc80/pc/ps2_controller.asl>

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@ -46,6 +46,8 @@ DefinitionBlock (
} }
} /* End Scope(_SB) */ } /* End Scope(_SB) */
#include "acpi/superio.asl"
/* Contains the supported sleep states for this chipset */ /* Contains the supported sleep states for this chipset */
#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl> #include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>