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tegra124: implement platform_prog_run() 

The tegra124 SoC is currently booting up on the AVP cpu which
bootstraps the rest of the SoC. Upon exiting bootblock it
runs romstage from its faster armv7 core. Instead of hard
coding the stage loading operations use run_romstage().

Change-Id: Idddcfd5443f08d4dd41e1d9b71650ff6d4b14bc4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8847
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Aaron Durbin 2015-03-20 16:42:17 -05:00 committed by Aaron Durbin
parent 460703bbb4
commit 825a5a85b1
1 changed files with 22 additions and 19 deletions
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41
src/soc/nvidia/tegra124/bootblock.c
View File

@ -22,16 +22,30 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <cbfs.h> #include <cbfs.h>
#include <console/console.h> #include <console/console.h>
#include <program_loading.h>
#include <soc/clock.h> #include <soc/clock.h>
#include <soc/nvidia/tegra/apbmisc.h> #include <soc/nvidia/tegra/apbmisc.h>
#include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/chromeos.h>
#include "pinmux.h" #include "pinmux.h"
#include "power.h" #include "power.h"
static void run_next_stage(void *entry)
{
ASSERT(entry);
clock_cpu0_config(entry);
power_enable_and_ungate_cpu();
/* Repair ram on cluster0 and cluster1 after CPU is powered on. */
ram_repair();
clock_cpu0_remove_reset();
clock_halt_avp();
}
void main(void) void main(void)
{ {
void *entry;
// enable pinmux clamp inputs // enable pinmux clamp inputs
clamp_tristate_inputs(); clamp_tristate_inputs();
@ -70,21 +84,10 @@ void main(void)
PINMUX_PWR_INT_N_FUNC_PMICINTR | PINMUX_PWR_INT_N_FUNC_PMICINTR |
PINMUX_INPUT_ENABLE); PINMUX_INPUT_ENABLE);
if (IS_ENABLED(CONFIG_VBOOT2_VERIFY_FIRMWARE)) run_romstage();
entry = NULL; }
else
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, void platform_prog_run(struct prog *prog)
CONFIG_CBFS_PREFIX "/romstage"); {
run_next_stage(prog_entry(prog));
ASSERT(entry);
clock_cpu0_config(entry);
power_enable_and_ungate_cpu();
/* Repair ram on cluster0 and cluster1 after CPU is powered on. */
ram_repair();
clock_cpu0_remove_reset();
clock_halt_avp();
} }