soc/amd/picasso/chip: fix typo in acp_pme_enable

That devicetree setting is about the Audio Co-Processor and not ACPI.

BRANCH=zork

Change-Id: I7f376371ee094392d4434340c77f0fc8d0d8e4e1
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb

@@ -8,7 +8,7 @@ chip soc/amd/picasso
 
 	register "acp_pin_cfg" = "I2S_PINS_I2S_TDM"
 	register "acp_i2s_wake_enable" = "0"
-	register "acpi_pme_enable" = "0"
+	register "acp_pme_enable" = "0"
 
 	# Start : OPN Performance Configuration
 	# (Configuratin that is common for all variants)

src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb

@@ -8,7 +8,7 @@ chip soc/amd/picasso
 
 	register "acp_pin_cfg" = "I2S_PINS_I2S_TDM"
 	register "acp_i2s_wake_enable" = "0"
-	register "acpi_pme_enable" = "0"
+	register "acp_pme_enable" = "0"
 
 	# Start : OPN Performance Configuration
 	# (Configuratin that is common for all variants)

src/mainboard/google/zork/variants/baseboard/ramstage_common.c

@@ -71,7 +71,7 @@ static void update_hp_int_odl(void)
 	 */
 	soc_cfg = config_of_soc();
 	soc_cfg->acp_i2s_wake_enable = 1;
-	soc_cfg->acpi_pme_enable = 1;
+	soc_cfg->acp_pme_enable = 1;
 }
 
 static void update_dmic_gpio(void)

src/soc/amd/picasso/acp.c

@@ -45,7 +45,7 @@ static void init(struct device *dev)
 
 	/* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */
 	acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_i2s_wake_enable);
-	acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acpi_pme_enable);
+	acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acp_pme_enable);
 
 	if (cfg->acp_pin_cfg == I2S_PINS_I2S_TDM)
 		sb_clk_output_48Mhz(); /* Internal connection to I2S */

src/soc/amd/picasso/chip.h

@@ -63,7 +63,7 @@ struct soc_amd_picasso_config {
 	/* Enable ACP I2S wake feature (0 = disable, 1 = enable) */
 	u8 acp_i2s_wake_enable;
 	/* Enable ACP PME (0 = disable, 1 = enable) */
-	u8 acpi_pme_enable;
+	u8 acp_pme_enable;
 
 	/**
 	 * IRQ 0 - 15 have a default trigger of edge and default polarity of high.