payloads/edk2: Hook up PCIe Resizable BARs flag

Hook up edk2 build flag PcdPcieResizableBarSupport to coreboot
Kconfig CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS.

Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I5cc12d32c5e132b9f99ec650377d7683377c2a9c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74926
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Lean Sheng Tan 2023-05-03 15:27:21 +02:00 committed by Stefan Reinauer
parent 15081fe01a
commit 829b228ad7
2 changed files with 5 additions and 0 deletions

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@ -184,6 +184,7 @@ $(obj)/UEFIPAYLOAD.fd: $(DOTCONFIG)
CONFIG_EDK2_SD_MMC_TIMEOUT=$(CONFIG_EDK2_SD_MMC_TIMEOUT) \
CONFIG_ECAM_MMCONF_BASE_ADDRESS=$(CONFIG_ECAM_MMCONF_BASE_ADDRESS) \
CONFIG_ECAM_MMCONF_LENGTH=$(CONFIG_ECAM_MMCONF_LENGTH) \
CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=$(CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS) \
CONFIG_CPU_XTAL_HZ=$(CONFIG_CPU_XTAL_HZ) \
CONFIG_SMMSTORE_V2=$(CONFIG_SMMSTORE_v2) \
CONFIG_EDK2_SECURE_BOOT_SUPPORT=$(CONFIG_EDK2_SECURE_BOOT_SUPPORT) \

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@ -115,6 +115,10 @@ endif
ifeq ($(CONFIG_EDK2_SECURE_BOOT_SUPPORT), y)
BUILD_STR += -D SECURE_BOOT_ENABLE=TRUE
endif
# PCIEXP_SUPPORT_RESIZABLE_BARS = FALSE
ifeq ($(CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS), y)
BUILD_STR += --pcd gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableBarSupport=TRUE
endif
#
# EDKII has the below PCDs that are relevant to coreboot: