soc/intel: Use common codeflow for MP init
This fixes MP init on xeon_sp SoCs which was broken by 69cd729
(mb/*:
Remove lapic from devicetree).
Alderlake cpu code was linked in romstage but unused so drop it.
Change-Id: Ia822468a6f15565b97e57612a294a0b80b45b932
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
This commit is contained in:
parent
6b2b8355b3
commit
829e8e65b9
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@ -22,7 +22,6 @@ romstage-y += espi.c
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romstage-y += meminit.c
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romstage-y += pcie_rp.c
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romstage-y += reset.c
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romstage-y += cpu.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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@ -188,7 +188,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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@ -209,7 +209,7 @@ static struct device_operations pci_domain_ops = {
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struct device_operations apl_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = apollolake_init_cpus,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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@ -262,18 +262,11 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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/* Clear for take-off */
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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}
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void apollolake_init_cpus(struct device *dev)
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{
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if (!dev->link_list)
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add_more_links(dev, 1);
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soc_init_cpus(dev->link_list);
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/* Temporarily cache the memory-mapped boot media. */
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if (CONFIG(BOOT_DEVICE_MEMORY_MAPPED) &&
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@ -8,7 +8,6 @@
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#include <soc/msr.h>
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struct device;
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void apollolake_init_cpus(struct device *dev);
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void mainboard_devtree_update(struct device *dev);
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/* Flush L1D to L2 */
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@ -203,7 +203,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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@ -135,16 +135,12 @@ void get_microcode_info(const void **microcode, int *parallel)
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* creation of the new node will be skipped. This node will have the APIC ID defined
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* in devicetree.
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*/
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void init_cpus(void)
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static void init_cpus(void)
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{
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struct device *dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
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assert(dev != NULL);
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/* In case link to APIC device is not found, create the one */
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if (!dev->link_list)
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add_more_links(dev, 1);
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soc_init_cpus(dev->link_list);
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mp_cpu_bus_init(dev);
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}
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static void coreboot_init_cpus(void *unused)
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@ -23,16 +23,6 @@ int get_cpu_count(void);
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*/
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void get_microcode_info(const void **microcode, int *parallel);
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/*
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* Perform BSP and AP initialization
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* This function can be called in below cases
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* 1. During coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude
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* this call if user has selected USE_INTEL_FSP_MP_INIT)
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* 2. coreboot would like to take APs control back after FSP-S has done with MP
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* initialization based on user select USE_INTEL_FSP_MP_INIT
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*/
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void init_cpus(void);
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/*
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* This function will perform any recommended CPU (BSP and AP) initialization
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* after coreboot has done the multiprocessor initialization (before FSP-S)
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@ -52,14 +42,4 @@ void before_post_cpus_init(void);
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*/
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void soc_core_init(struct device *dev);
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/*
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* In this function SOC must fill required mp_ops params, also it
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* should call these mp_ops callback functions by calling
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* mp_init_with_smm() function from x86/mp_init.c file.
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*
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* Also, if there is any other SOC specific functionalities to be
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* implemented before or after MP Init, it can be done here.
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*/
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void soc_init_cpus(struct bus *cpu_bus);
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#endif /* SOC_INTEL_COMMON_BLOCK_MP_INIT_H */
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@ -137,7 +137,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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@ -131,7 +131,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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@ -167,7 +167,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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if (mp_init_with_smm(cpu_bus, &mp_ops))
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printk(BIOS_ERR, "MP initialization failure.\n");
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@ -236,7 +236,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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@ -137,7 +137,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void soc_init_cpus(struct bus *cpu_bus)
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void mp_init_cpus(struct bus *cpu_bus)
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{
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(cpu_bus, &mp_ops);
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@ -49,7 +49,7 @@ static struct device_operations pci_domain_ops = {
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static struct device_operations cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = cpx_init_cpus,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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@ -211,7 +211,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void cpx_init_cpus(struct device *dev)
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void mp_init_cpus(struct bus *bus)
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{
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microcode_patch = intel_microcode_find();
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@ -221,13 +221,13 @@ void cpx_init_cpus(struct device *dev)
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intel_microcode_load_unlocked(microcode_patch);
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(dev->link_list, &mp_ops);
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mp_init_with_smm(bus, &mp_ops);
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/*
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* chip_config is used in cpu device callback. Other than cpu 0,
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* rest of the CPU devices do not have chip_info updated.
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*/
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chip_config = dev->chip_info;
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chip_config = bus->dev->chip_info;
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/* update numa domain for all cpu devices */
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xeonsp_init_cpu_config();
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@ -35,7 +35,7 @@ static struct device_operations pci_domain_ops = {
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static struct device_operations cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = xeon_sp_init_cpus,
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.init = mp_cpu_bus_init,
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#if CONFIG(HAVE_ACPI_TABLES)
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/* defined in src/soc/intel/common/block/acpi/acpi.c */
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.acpi_fill_ssdt = generate_cpu_entries,
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@ -228,7 +228,7 @@ static const struct mp_ops mp_ops = {
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.post_mp_init = post_mp_init,
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};
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void xeon_sp_init_cpus(struct device *dev)
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void mp_init_cpus(struct bus *bus)
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{
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FUNC_ENTER();
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@ -237,13 +237,13 @@ void xeon_sp_init_cpus(struct device *dev)
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* rest of the CPU devices do not have
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* chip_info updated. Global chip_config is used as workaround
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*/
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chip_config = dev->chip_info;
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chip_config = bus->dev->chip_info;
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config_reset_cpl3_csrs();
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/* calls src/cpu/x86/mp_init.c */
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/* TODO: Handle mp_init_with_smm failure? */
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mp_init_with_smm(dev->link_list, &mp_ops);
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mp_init_with_smm(bus, &mp_ops);
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/* update numa domain for all cpu devices */
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xeonsp_init_cpu_config();
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