From 82a8d8172ceef623b78a27bf00b4b9c084623501 Mon Sep 17 00:00:00 2001
From: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Date: Fri, 13 May 2022 19:06:01 +0800
Subject: [PATCH] mb/google/brya/var/kinox: Set memory SMBus addresses to 0x52,
 0x50

Follow the Kinox_schematic_R01_20220418.pdf to set memory SMBus
addresses to 0x52, 0x50.

BUG=b:231398371
TEST=Build and boot to OS with either 1 or 2 DIMM slots populated.

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I32bb4f62a6b8a485ac757a60f5d16adb69109e2f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
---
 src/mainboard/google/brya/variants/kinox/memory.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/mainboard/google/brya/variants/kinox/memory.c b/src/mainboard/google/brya/variants/kinox/memory.c
index ad33e9c9c7..f979035833 100644
--- a/src/mainboard/google/brya/variants/kinox/memory.c
+++ b/src/mainboard/google/brya/variants/kinox/memory.c
@@ -29,3 +29,10 @@ const struct mb_cfg *variant_memory_params(void)
 {
 	return &ddr4_mem_config;
 }
+
+void variant_get_spd_info(struct mem_spd *spd_info)
+{
+	spd_info->topo = MEM_TOPO_DIMM_MODULE;
+	spd_info->smbus[0].addr_dimm[0] = 0x52;
+	spd_info->smbus[1].addr_dimm[0] = 0x50;
+}