From 82d5123e1ca932b4fcb3117c859027f84873bd70 Mon Sep 17 00:00:00 2001 From: Shaunak Saha Date: Wed, 17 Feb 2021 23:26:43 -0800 Subject: [PATCH] intel/tigerlake: Add Acoustic features On VCCin there was an oscillation which occurred just as the kernel started (kernel starting... message). On some devices, this behavior seems even worse. In previous platforms VCCin toggled for a few ms and then was stable. For volteer, this happens at the same point in time for around 40ms. However, it starts oscillating again later in the boot sequence. Once at the root shell, it seems to oscillate indefinitely at around 100-200Hz (very variable though). To fix this we need to control the deep C-state voltage slew rate.We have options for controlling the deep C-state voltage slew rate through FSP UPDs. This patch expose the following FSP UPD interface into coreboot: - AcousticNoiseMitigation - FastPkgCRampDisable - SlowSlewRate We are setting SlowSlewRate for all volteer boards to 2 which is Fast/8. TGL has a single VR domain(Vccin). Hence, the chip config is updated to allow mainboards to set a single value instead of an array and FSP UPDs are accordingly set. BUG=b:153015585 BRANCH=firmware-volteer-13672.B TEST= Measure the change in noise level by changing the UPD values. Signed-off-by: Shaunak Saha Change-Id: Ica7f1f29995df33bdebb1fd55169cdb36f329ff8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50870 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- .../volteer/variants/baseboard/devicetree.cb | 5 +++++ .../volteer/variants/delbin/overridetree.cb | 11 ----------- .../volteer/variants/drobit/overridetree.cb | 11 ----------- .../volteer/variants/volteer/overridetree.cb | 11 ----------- .../volteer/variants/volteer2/overridetree.cb | 11 ----------- .../volteer/variants/voxel/overridetree.cb | 11 ----------- src/soc/intel/tigerlake/chip.h | 17 ++++++++--------- src/soc/intel/tigerlake/fsp_params.c | 8 ++------ 8 files changed, 15 insertions(+), 70 deletions(-) diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 5f058446c6..58d1aac79b 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -352,6 +352,11 @@ chip soc/intel/tigerlake .vnn_sx_voltage_mv = 1250, }" + # Acoustic settings + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRate" = "SLEW_FAST_8" + register "FastPkgCRampDisable" = "1" + device domain 0 on device ref igpu on end device ref dptf on diff --git a/src/mainboard/google/volteer/variants/delbin/overridetree.cb b/src/mainboard/google/volteer/variants/delbin/overridetree.cb index c111731387..1549aafe47 100644 --- a/src/mainboard/google/volteer/variants/delbin/overridetree.cb +++ b/src/mainboard/google/volteer/variants/delbin/overridetree.cb @@ -57,17 +57,6 @@ chip soc/intel/tigerlake }" register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)" - # Acoustic settings - register "AcousticNoiseMitigation" = "1" - register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8" - register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1" - register "tcc_offset" = "8" register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{ diff --git a/src/mainboard/google/volteer/variants/drobit/overridetree.cb b/src/mainboard/google/volteer/variants/drobit/overridetree.cb index a29ce1c24b..87c1417261 100644 --- a/src/mainboard/google/volteer/variants/drobit/overridetree.cb +++ b/src/mainboard/google/volteer/variants/drobit/overridetree.cb @@ -2,17 +2,6 @@ chip soc/intel/tigerlake register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" - # Acoustic settings - register "AcousticNoiseMitigation" = "1" - register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8" - register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1" - register "tcc_offset" = "8" register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{ diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb index 10e199ae4d..bce953b8cd 100644 --- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb @@ -49,17 +49,6 @@ chip soc/intel/tigerlake register "HybridStorageMode" = "1" - # Acoustic settings - register "AcousticNoiseMitigation" = "1" - register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8" - register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1" - device domain 0 on device ref ipu on end device ref i2c0 on diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index f517de246c..635a310ea8 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -65,17 +65,6 @@ chip soc/intel/tigerlake register "HybridStorageMode" = "1" - # Acoustic settings - register "AcousticNoiseMitigation" = "1" - register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8" - register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1" - device domain 0 on device ref dptf on chip drivers/intel/dptf diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index c1002ef752..a1453f950c 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -19,17 +19,6 @@ chip soc/intel/tigerlake # Disable SRCCLKREQ1# register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED" - # Acoustic settings - register "AcousticNoiseMitigation" = "1" - register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8" - register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8" - register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" - register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1" - device domain 0 on device ref dptf on chip drivers/intel/dptf diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index af9b310ba3..1a1ba73d2c 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -186,22 +186,21 @@ struct soc_intel_tigerlake_config { /* * Offset 0x054B - Disable Fast Slew Rate for Deep Package - * C States for VR domains. Disable Fast Slew Rate for Deep - * Package C States based on Acoustic Noise Mitigation feature - * enabled. The domains are IA,GT,SA,VLCC and FIVR. + * C States for VCCin in VR domain. Disable Fast Slew Rate + * for Deep Package C States based on Acoustic Noise + * Mitigation feature enabled. * 0 - False * 1 - True */ - uint8_t FastPkgCRampDisable[VR_DOMAIN_MAX]; + uint8_t FastPkgCRampDisable; /* * Offset 0x0550 - Slew Rate configuration for Deep Package - * C States for VR domains. Slew Rate configuration for Deep - * Package C States for VR domains based on Acoustic Noise - * Mitigation feature enabled. The domains are IA,GT,SA,VLCC and FIVR. - * Slew rates are defined as enum slew_rate. + * C States for VCCin in VR domain. Slew Rate configuration + * for Deep Package C States for VR domain based on Acoustic + * Noise Mitigation feature enabled. */ - uint8_t SlowSlewRate[VR_DOMAIN_MAX]; + uint8_t SlowSlewRate; /* SATA related */ uint8_t SataEnable; diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 6bd4a7cbe1..9fbf9bd009 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -332,12 +332,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) } params->AcousticNoiseMitigation = config->AcousticNoiseMitigation; - memcpy(¶ms->SlowSlewRate, &config->SlowSlewRate, - ARRAY_SIZE(config->SlowSlewRate) * sizeof(config->SlowSlewRate[0])); - - memcpy(¶ms->FastPkgCRampDisable, &config->FastPkgCRampDisable, - ARRAY_SIZE(config->FastPkgCRampDisable) * - sizeof(config->FastPkgCRampDisable[0])); + params->FastPkgCRampDisable[0] = config->FastPkgCRampDisable; + params->SlowSlewRate[0] = config->SlowSlewRate; /* Enable TCPU for processor thermal control */ params->Device4Enable = config->Device4Enable;