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nb/intel/haswell: correct a typo in Kconfig 

Change-Id: I115e065ce11946b85571e7233203be68c1789d70
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Joel Kitching 2019-04-30 13:13:40 +08:00 committed by Nico Huber
parent c0fe0b28a9
commit 82d73e2d5a
1 changed files with 1 additions and 1 deletions
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src/northbridge/intel/haswell/Kconfig
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@ -37,7 +37,7 @@ config HASWELL_VBOOT_IN_BOOTBLOCK
Haswell can either start verstage in a separate stage
right after the bootblock has run or it can start it
after romstage for compatibility reasons.
Haswell however uses a mrc.bin to initialse memory which
Haswell however uses a mrc.bin to initialize memory which
needs to be located at a fixed offset. Therefore even with
a separate verstage starting after the bootblock that same
binary is used meaning a jump is made from RW to the RO region