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soc/amd/common/block/cpu/mca/mcax: print all MCAX registers 

Also move the registers in the order they are in the hardware.

Change-Id: If018e746e58c14475caeda76feb8b5281d7732f1
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56315
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-07-14 19:09:25 +02:00
parent ae4f0ceb88
commit 82e2f3229e
1 changed files with 22 additions and 3 deletions
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25
src/soc/amd/common/block/cpu/mca/mcax.c
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@ -14,6 +14,7 @@ bool mca_skip_check(void)
return false;
}
/* Print the contents of the MCAX registers for a given bank */
void mca_print_error(unsigned int bank)
{
msr_t msr;
@ -21,14 +22,32 @@ void mca_print_error(unsigned int bank)
printk(BIOS_WARNING, "#MC Error: core %u, bank %u %s\n", initial_lapicid(), bank,
mca_get_bank_name(bank));
msr = rdmsr(MCAX_CTL_MSR(bank));
printk(BIOS_WARNING, " MC%u_CTL = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_STATUS_MSR(bank));
printk(BIOS_WARNING, " MC%u_STATUS = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_ADDR_MSR(bank));
printk(BIOS_WARNING, " MC%u_ADDR = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_MISC0_MSR(bank));
printk(BIOS_WARNING, " MC%u_MISC = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_CTL_MSR(bank));
printk(BIOS_WARNING, " MC%u_CTL = %08x_%08x\n", bank, msr.hi, msr.lo);
printk(BIOS_WARNING, " MC%u_MISC0 = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_CONFIG_MSR(bank));
printk(BIOS_WARNING, " MC%u_CONFIG = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_IPID_MSR(bank));
printk(BIOS_WARNING, " MC%u_IPID = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_SYND_MSR(bank));
printk(BIOS_WARNING, " MC%u_SYND = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_DESTAT_MSR(bank));
printk(BIOS_WARNING, " MC%u_DESTAT = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_DEADDR_MSR(bank));
printk(BIOS_WARNING, " MC%u_DEADDR = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_MISC1_MSR(bank));
printk(BIOS_WARNING, " MC%u_MISC1 = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_MISC2_MSR(bank));
printk(BIOS_WARNING, " MC%u_MISC2 = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_MISC3_MSR(bank));
printk(BIOS_WARNING, " MC%u_MISC3 = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCAX_MISC4_MSR(bank));
printk(BIOS_WARNING, " MC%u_MISC4 = %08x_%08x\n", bank, msr.hi, msr.lo);
msr = rdmsr(MCA_CTL_MASK_MSR(bank));
printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
}