baytrail: gpio: add configs for PU/PD functional pins
Pull-ups and pull-downs can be active on functional pins. Add configs for these options so they can be specified on board GPIO maps. TEST=Manual on bayleybay. Verify that platform boots to payload load. BUG=chrome-os-partner:22863 Change-Id: Ie4f77d8ce812f086cc8fe5a6bfcac59669f56f92 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172766 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/5209 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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@ -187,47 +187,35 @@
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.io_sel = GPIO_DIR_OUTPUT, \
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.gp_lvl = GPIO_LEVEL_HIGH }
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#define GPIO_FUNC0 \
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/* Define no-pull / PU / PD configs for each functional config option */
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#define _GPIO_FUNC(_func, _pu, _str) \
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{ .use_sel = GPIO_USE_PAD, \
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.pad_conf0 = PAD_FUNC0 | PAD_CONFIG0_DEFAULT, \
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.pad_conf0 = PAD_FUNC##_func | PAD_PU_##_pu | PAD_PU_##_str | \
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PAD_CONFIG0_DEFAULT, \
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.pad_conf1 = PAD_CONFIG1_DEFAULT, \
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.pad_val = PAD_VAL_DEFAULT }
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#define GPIO_FUNC1 \
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{ .use_sel = GPIO_USE_PAD, \
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.pad_conf0 = PAD_FUNC1 | PAD_CONFIG0_DEFAULT, \
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.pad_conf1 = PAD_CONFIG1_DEFAULT, \
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.pad_val = PAD_VAL_DEFAULT }
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#define GPIO_FUNC2 \
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{ .use_sel = GPIO_USE_PAD, \
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.pad_conf0 = PAD_FUNC2 | PAD_CONFIG0_DEFAULT, \
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.pad_conf1 = PAD_CONFIG1_DEFAULT, \
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.pad_val = PAD_VAL_DEFAULT }
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#define GPIO_FUNC3 \
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{ .use_sel = GPIO_USE_PAD, \
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.pad_conf0 = PAD_FUNC3 | PAD_CONFIG0_DEFAULT, \
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.pad_conf1 = PAD_CONFIG1_DEFAULT, \
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.pad_val = PAD_VAL_DEFAULT }
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#define GPIO_FUNC4 \
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{ .use_sel = GPIO_USE_PAD, \
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.pad_conf0 = PAD_FUNC4 | PAD_CONFIG0_DEFAULT, \
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.pad_conf1 = PAD_CONFIG1_DEFAULT, \
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.pad_val = PAD_VAL_DEFAULT }
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#define GPIO_FUNC5 \
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{ .use_sel = GPIO_USE_PAD, \
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.pad_conf0 = PAD_FUNC5 | PAD_CONFIG0_DEFAULT, \
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.pad_conf1 = PAD_CONFIG1_DEFAULT, \
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.pad_val = PAD_VAL_DEFAULT }
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#define GPIO_FUNC6 \
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{ .use_sel = GPIO_USE_PAD, \
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.pad_conf0 = PAD_FUNC6 | PAD_CONFIG0_DEFAULT, \
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.pad_conf1 = PAD_CONFIG1_DEFAULT, \
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.pad_val = PAD_VAL_DEFAULT }
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#define GPIO_FUNC0 _GPIO_FUNC(0, DISABLE, 10K)
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#define GPIO_FUNC0_PU_10K _GPIO_FUNC(0, UP, 10K)
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#define GPIO_FUNC0_PD_10K _GPIO_FUNC(0, DOWN, 10K)
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#define GPIO_FUNC1 _GPIO_FUNC(1, DISABLE, 10K)
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#define GPIO_FUNC1_PU_10K _GPIO_FUNC(1, UP, 10K)
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#define GPIO_FUNC1_PD_10K _GPIO_FUNC(1, DOWN, 10K)
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#define GPIO_FUNC2 _GPIO_FUNC(2, DISABLE, 10K)
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#define GPIO_FUNC2_PU_10K _GPIO_FUNC(2, UP, 10K)
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#define GPIO_FUNC2_PD_10K _GPIO_FUNC(2, DOWN, 10K)
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#define GPIO_FUNC3 _GPIO_FUNC(3, DISABLE, 10K)
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#define GPIO_FUNC3_PU_10K _GPIO_FUNC(3, UP, 10K)
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#define GPIO_FUNC3_PD_10K _GPIO_FUNC(3, DOWN, 10K)
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#define GPIO_FUNC4 _GPIO_FUNC(4, DISABLE, 10K)
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#define GPIO_FUNC4_PU_10K _GPIO_FUNC(4, UP, 10K)
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#define GPIO_FUNC4_PD_10K _GPIO_FUNC(4, DOWN, 10K)
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#define GPIO_FUNC5 _GPIO_FUNC(5, DISABLE, 10K)
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#define GPIO_FUNC5_PU_10K _GPIO_FUNC(5, UP, 10K)
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#define GPIO_FUNC5_PD_10K _GPIO_FUNC(5, DOWN, 10K)
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#define GPIO_FUNC6 _GPIO_FUNC(6, DISABLE, 10K)
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#define GPIO_FUNC6_PU_10K _GPIO_FUNC(6, UP, 10K)
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#define GPIO_FUNC6_PD_10K _GPIO_FUNC(6, DOWN, 10K)
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/* End marker */
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#define GPIO_LIST_END 0xffffffff
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