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vendorcode/cavium: Fix set but unused variables 

TEST: BUILD_TIMELESS=1 remains the same.

Change-Id: Id2cb37dbe4d450fe7f91a527b5cd73ac55863548
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74542
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Arthur Heymans 2023-04-18 18:55:21 +02:00 committed by Elyes Haouas
parent 73e6318ec7
commit 830be4d3ea
3 changed files with 2 additions and 18 deletions
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3
src/vendorcode/cavium/bdk/libbdk-hal/bdk-qlm.c
View File

@ -372,7 +372,6 @@ int bdk_qlm_eye_display(bdk_node_t node, int qlm, int qlm_lane, int format, cons
}
/* Calculate the max eye width */
int eye_area = 0;
int eye_width = 0;
for (int y = 0; y < eye->height; y++)
{
@ -382,7 +381,6 @@ int bdk_qlm_eye_display(bdk_node_t node, int qlm, int qlm_lane, int format, cons
if (eye->data[y][x] == 0)
{
width++;
eye_area++;
}
}
if (width > eye_width)
@ -399,7 +397,6 @@ int bdk_qlm_eye_display(bdk_node_t node, int qlm, int qlm_lane, int format, cons
if (eye->data[y][x] == 0)
{
height++;
eye_area++;
}
}
if (height > eye_height)

4
src/vendorcode/cavium/bdk/libdram/dram-init-ddr3.c
View File

@ -5895,7 +5895,6 @@ int init_octeon3_ddr3_interface(bdk_node_t node,
bdk_lmcx_modereg_params1_t lmc_modereg_params1;
unsigned char rodt_ctl;
unsigned char rankx = 0;
int rlevel_rodt_errors = 0;
unsigned char ecc_ena;
unsigned char rtt_nom;
unsigned char rtt_idx;
@ -6200,7 +6199,6 @@ int init_octeon3_ddr3_interface(bdk_node_t node,
#if PICK_BEST_RANK_SCORE_NOT_AVG
rlevel_best_rank_score = DEFAULT_BEST_RANK_SCORE;
#endif
rlevel_rodt_errors = 0;
lmc_comp_ctl2.u = BDK_CSR_READ(node, BDK_LMCX_COMP_CTL2(ddr_interface_num));
lmc_comp_ctl2.s.rodt_ctl = rodt_ctl;
DRAM_CSR_WRITE(node, BDK_LMCX_COMP_CTL2(ddr_interface_num), lmc_comp_ctl2.u);
@ -6463,8 +6461,6 @@ int init_octeon3_ddr3_interface(bdk_node_t node,
} /* for (byte_idx = 0; byte_idx < 9; ++byte_idx) */
#endif /* PICK_BEST_RANK_SCORE_NOT_AVG */
rlevel_rodt_errors += rlevel_rank_errors;
} /* for (average_loops = 0; average_loops < rlevel_avg_loops; average_loops++) */
#if PICK_BEST_RANK_SCORE_NOT_AVG

13
src/vendorcode/cavium/bdk/libdram/dram-tune-ddr3.c
View File

@ -586,7 +586,7 @@ auto_set_dll_offset(bdk_node_t node, int dll_offset_mode,
int start_offset, end_offset, incr_offset;
int speed_bin = get_speed_bin(node, 0); // FIXME: just get from LMC0?
int low_risk_count = 0, needs_review_count = 0;
int needs_review_count = 0;
if (dram_tune_use_gran != DEFAULT_SAMPLE_GRAN) {
ddr_print2("N%d: Changing sample granularity from %d to %d\n",
@ -762,8 +762,6 @@ auto_set_dll_offset(bdk_node_t node, int dll_offset_mode,
if (will_need_review)
needs_review_count++;
else
low_risk_count++;
} else { // if just tuning, make the printout less lengthy
ddr_print("%5d ", byte_offset);
}
@ -1241,7 +1239,7 @@ hw_assist_test_dll_offset(bdk_node_t node, int dll_offset_mode,
int rank_delay_count[4][9];
int rank_delay_best_start[4][9];
int rank_delay_best_count[4][9];
int errors[4], off_errors, tot_errors;
int errors[4];
int num_lmcs = __bdk_dram_get_num_lmc(node);
int rank_mask, rankx, active_ranks;
int pattern;
@ -1291,8 +1289,6 @@ hw_assist_test_dll_offset(bdk_node_t node, int dll_offset_mode,
#define BYTE_OFFSET_INCR 3 // FIXME: make this tunable?
tot_errors = 0;
memset(rank_delay_count, 0, sizeof(rank_delay_count));
memset(rank_delay_start, 0, sizeof(rank_delay_start));
memset(rank_delay_best_count, 0, sizeof(rank_delay_best_count));
@ -1311,8 +1307,6 @@ hw_assist_test_dll_offset(bdk_node_t node, int dll_offset_mode,
// run the test on each rank
// only 1 call per rank should be enough, let the bursts, loops, etc, control the load...
off_errors = 0; // errors for this byte_offset, all ranks
active_ranks = 0;
for (rankx = 0; rankx < 4; rankx++) {
@ -1333,7 +1327,6 @@ hw_assist_test_dll_offset(bdk_node_t node, int dll_offset_mode,
// check errors
if (errors[rankx] & (1 << byte)) { // yes, an error in the byte lane in this rank
off_errors |= (1 << byte);
ddr_print5("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: Address 0x%012llx errors 0x%x\n",
node, lmc, rankx, bytelane, mode_str,
@ -1365,8 +1358,6 @@ hw_assist_test_dll_offset(bdk_node_t node, int dll_offset_mode,
} /* for (byte = byte_lo; byte <= byte_hi; byte++) */
} /* for (rankx = 0; rankx < 4; rankx++) */
tot_errors |= off_errors;
} /* for (byte_offset = -63; byte_offset < 64; byte_offset += BYTE_OFFSET_INCR) */
// now choose the best byte_offsets for this pattern according to the best windows of the tested ranks