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AGESA,binaryPI: Fix use of chip.h 

Change-Id: I123db3a51a8f354359e8ed5040d23111ea4eb8a4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Kyösti Mälkki 2019-08-19 13:29:46 +03:00
parent 9a016236d4
commit 830e0de401
4 changed files with 14 additions and 14 deletions
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1
src/southbridge/amd/agesa/hudson/hudson.h
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@ -18,7 +18,6 @@
#define HUDSON_H #define HUDSON_H
#include <device/device.h> #include <device/device.h>
#include "chip.h"
/* Power management index/data registers */ /* Power management index/data registers */
#define BIOSRAM_INDEX 0xcd4 #define BIOSRAM_INDEX 0xcd4

13
src/southbridge/amd/agesa/hudson/sd.c
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@ -18,18 +18,19 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include "chip.h"
#include "hudson.h" #include "hudson.h"
static void sd_init(struct device *dev) static void sd_init(struct device *dev)
{ {
u32 stepping; struct southbridge_amd_agesa_hudson_config *sd_chip = dev->chip_info;
u32 stepping = pci_read_config32(pcidev_on_root(0x18, 3), 0xFC);
u8 sd_mode = 0;
stepping = pci_read_config32(pcidev_on_root(0x18, 3), 0xFC); if (sd_chip)
sd_mode = sd_chip->sd_mode;
struct southbridge_amd_agesa_hudson_config *sd_chip = if (sd_mode == 3) { /* SD 3.0 mode */
(struct southbridge_amd_agesa_hudson_config *)(dev->chip_info);
if (sd_chip->sd_mode == 3) { /* SD 3.0 mode */
pci_write_config32(dev, 0xA4, 0x31FEC8B2); pci_write_config32(dev, 0xA4, 0x31FEC8B2);
pci_write_config32(dev, 0xA8, 0x00002503); pci_write_config32(dev, 0xA8, 0x00002503);
pci_write_config32(dev, 0xB0, 0x02180C19); pci_write_config32(dev, 0xB0, 0x02180C19);

1
src/southbridge/amd/pi/hudson/hudson.h
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@ -19,7 +19,6 @@
#include <types.h> #include <types.h>
#include <device/device.h> #include <device/device.h>
#include "chip.h"
/* Offsets from ACPI_MMIO_BASE /* Offsets from ACPI_MMIO_BASE
* This is defined by AGESA, but we don't include AGESA headers to avoid * This is defined by AGESA, but we don't include AGESA headers to avoid

13
src/southbridge/amd/pi/hudson/sd.c
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@ -18,18 +18,19 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include "chip.h"
#include "hudson.h" #include "hudson.h"
static void sd_init(struct device *dev) static void sd_init(struct device *dev)
{ {
u32 stepping; struct southbridge_amd_pi_hudson_config *sd_chip = dev->chip_info;
u32 stepping = pci_read_config32(pcidev_on_root(0x18, 3), 0xFC);
u8 sd_mode = 0;
stepping = pci_read_config32(pcidev_on_root(0x18, 3), 0xFC); if (sd_chip)
sd_mode = sd_chip->sd_mode;
struct southbridge_amd_pi_hudson_config *sd_chip = if (sd_mode == 3) { /* SD 3.0 mode */
(struct southbridge_amd_pi_hudson_config *)(dev->chip_info);
if (sd_chip->sd_mode == 3) { /* SD 3.0 mode */
pci_write_config32(dev, 0xA4, 0x31FEC8B2); pci_write_config32(dev, 0xA4, 0x31FEC8B2);
pci_write_config32(dev, 0xA8, 0x00002503); pci_write_config32(dev, 0xA8, 0x00002503);
pci_write_config32(dev, 0xB0, 0x02180C19); pci_write_config32(dev, 0xB0, 0x02180C19);