From 8327a7e7b416a1f720f6aaa487a4cc9d2ce28d8b Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Tue, 27 Sep 2022 09:54:30 +0800 Subject: [PATCH] soc/intel/alderlake: Hook up DisableDynamicTccoldHandshake to dev tree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit provides a dev tree setting for partners to enable/disable TccoldHandshake for the sighting in doc:723158 BUG=b:221461379 BRANCH=firmware-brya-14505.B TEST=compile ok and FSP UPD is config properly Change-Id: Ica13b98204acebef7f0b9a4411b4ac19f53cad6e Signed-off-by: Kane Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/68635 Reviewed-by: Jérémy Compostella Reviewed-by: Nick Vaccaro Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/chip.h | 7 +++++++ src/soc/intel/alderlake/romstage/fsp_params.c | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 8e76e555ec..33549bcc72 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -680,6 +680,13 @@ struct soc_intel_alderlake_config { * IGD panel configuration */ struct i915_gpu_panel_config panel_cfg; + + /* + * Enable or Disable Tccold Handshake + * Default is set to 0. + * Set this to 1 in order to disable Tccold Handshake + */ + bool disable_dynamic_tccold_handshake; }; typedef struct soc_intel_alderlake_config config_t; diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 2e8a73cac8..df94e487a4 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -270,6 +270,11 @@ static void fill_fspm_tcss_params(FSP_M_CONFIG *m_cfg, /* TCSS DMA */ m_cfg->TcssDma0En = is_devfn_enabled(SA_DEVFN_TCSS_DMA0); m_cfg->TcssDma1En = is_devfn_enabled(SA_DEVFN_TCSS_DMA1); + +#if CONFIG(SOC_INTEL_RAPTORLAKE) + m_cfg->DisableDynamicTccoldHandshake = + config->disable_dynamic_tccold_handshake; +#endif } static void fill_fspm_usb4_params(FSP_M_CONFIG *m_cfg,