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soc/intel/xeon_sp/cpx: Fix loading MCU on APs 

Commit 393992f (cpu/mp_init: Fix microcode lock) fixed the semantics
of parallel loading microcode updates.

So now '*parallel = 1' really means loading MCU in parallel, which
seems to fail inconsistently on around 10% of the APs.

Change-Id: I755dd302abbb58537d840852e8e290bea282a674
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49671
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2021-01-18 20:00:35 +01:00 committed by Patrick Georgi
parent a626d2ed6f
commit 8331833c89
1 changed files with 6 additions and 1 deletions
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7
src/soc/intel/xeon_sp/cpx/cpu.c
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@ -51,10 +51,15 @@ static void xeon_configure_mca(void)
mca_configure();
}
/*
* On server platforms the FIT mechanism only updates the microcode on
* the BSP. Loading MCU on AP in parallel seems to fail in 10% of the cases
* so do it serialized.
*/
void get_microcode_info(const void **microcode, int *parallel)
{
*microcode = intel_mp_current_microcode();
*parallel = 1;
*parallel = 0;
}
const void *intel_mp_current_microcode(void)