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fix mainboards that were including earlymtrr.c without actually using it. 

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6502 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2011-04-15 00:19:27 +00:00 committed by Stefan Reinauer
parent 24ef134b37
commit 8345a194ba
5 changed files with 0 additions and 5 deletions
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1
src/mainboard/digitallogic/adl855pc/romstage.c
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@ -14,7 +14,6 @@
#include "northbridge/intel/i855/raminit.h" #include "northbridge/intel/i855/raminit.h"
#include "northbridge/intel/i855/debug.c" #include "northbridge/intel/i855/debug.c"
#include "superio/winbond/w83627hf/early_serial.c" #include "superio/winbond/w83627hf/early_serial.c"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#include <spd.h> #include <spd.h>

1
src/mainboard/intel/eagleheights/romstage.c
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@ -68,7 +68,6 @@ static inline int spd_read_byte(u16 device, u8 address)
} }
#include "northbridge/intel/i3100/raminit.h" #include "northbridge/intel/i3100/raminit.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/intel/i3100/memory_initialized.c" #include "northbridge/intel/i3100/memory_initialized.c"
#include "northbridge/intel/i3100/raminit.c" #include "northbridge/intel/i3100/raminit.c"
#include "lib/generic_sdram.c" #include "lib/generic_sdram.c"

1
src/mainboard/intel/mtarvon/romstage.c
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@ -31,7 +31,6 @@
#include "southbridge/intel/i3100/early_lpc.c" #include "southbridge/intel/i3100/early_lpc.c"
#include "northbridge/intel/i3100/raminit.h" #include "northbridge/intel/i3100/raminit.h"
#include "superio/intel/i3100/i3100.h" #include "superio/intel/i3100/i3100.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "superio/intel/i3100/early_serial.c" #include "superio/intel/i3100/early_serial.c"
#include "northbridge/intel/i3100/memory_initialized.c" #include "northbridge/intel/i3100/memory_initialized.c"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"

1
src/mainboard/lanner/em8510/romstage.c
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@ -37,7 +37,6 @@
#include "northbridge/intel/i855/raminit.h" #include "northbridge/intel/i855/raminit.h"
#include "northbridge/intel/i855/debug.c" #include "northbridge/intel/i855/debug.c"
#include "superio/winbond/w83627thg/early_serial.c" #include "superio/winbond/w83627thg/early_serial.c"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)

1
src/mainboard/tyan/s2735/romstage.c
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@ -13,7 +13,6 @@
#include "northbridge/intel/e7501/raminit.h" #include "northbridge/intel/e7501/raminit.h"
#include "northbridge/intel/e7501/debug.c" #include "northbridge/intel/e7501/debug.c"
#include "superio/winbond/w83627hf/early_serial.c" #include "superio/winbond/w83627hf/early_serial.c"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)