diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 4a6b9ef1ac..67eb446c9c 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -45,7 +45,6 @@
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 
 /* Used by ck804_early_setup(). */
-#define CK804_NUM 1
 #define CK804_USE_NIC 1
 #define CK804_USE_ACI 1
 
diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c
index 1c31997bfd..711ce0c49c 100644
--- a/src/mainboard/sunw/ultra40/romstage.c
+++ b/src/mainboard/sunw/ultra40/romstage.c
@@ -79,7 +79,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/dualcore/dualcore.c"
 
-#define CK804_NUM 2
 #define CK804_USE_NIC 1
 #define CK804_USE_ACI 1
 
diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c
index b84d6b6057..cef89942a5 100644
--- a/src/mainboard/tyan/s2892/romstage.c
+++ b/src/mainboard/tyan/s2892/romstage.c
@@ -60,7 +60,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/dualcore/dualcore.c"
 
-#define CK804_NUM 1
 #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h"
 //set GPIO to input mode
 #define CK804_MB_SETUP \
diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c
index 60f348ce23..486aa8d95a 100644
--- a/src/mainboard/tyan/s2895/romstage.c
+++ b/src/mainboard/tyan/s2895/romstage.c
@@ -73,7 +73,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/dualcore/dualcore.c"
 
-#define CK804_NUM 2
 #define CK804_USE_NIC 1
 #define CK804_USE_ACI 1
 
@@ -90,7 +89,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
 
-
 #include "cpu/amd/car/post_cache_as_ram.c"
 
 #include "cpu/amd/model_fxx/init_cpus.c"
diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c
index 82622cdc4c..e5fda596e7 100644
--- a/src/northbridge/amd/amdk8/setup_resource_map.c
+++ b/src/northbridge/amd/amdk8/setup_resource_map.c
@@ -15,7 +15,8 @@ static void setup_resource_map_offset(const unsigned int *register_values, int m
 #endif
 		dev = (register_values[i] & ~0xfff) + offset_pci_dev;
 		where = register_values[i] & 0xfff;
-		reg = pci_read_config32(dev, where);
+		if (register_values[i+1])
+			reg = pci_read_config32(dev, where);
 		reg &= register_values[i+1];
 		reg |= register_values[i+2] + offset_io_base;
 		pci_write_config32(dev, where, reg);
@@ -60,7 +61,8 @@ static void setup_resource_map_x_offset(const unsigned int *register_values, int
 			unsigned long reg;
 			dev = (register_values[i+1] & ~0xfff) + offset_pci_dev;
 			where = register_values[i+1] & 0xfff;
-			reg = pci_read_config32(dev, where);
+			if (register_values[i+2])
+				reg = pci_read_config32(dev, where);
 			reg &= register_values[i+2];
 			reg |= register_values[i+3];
 			pci_write_config32(dev, where, reg);
@@ -71,7 +73,8 @@ static void setup_resource_map_x_offset(const unsigned int *register_values, int
 			unsigned where;
 			unsigned reg;
 			where = register_values[i+1] + offset_io_base;
-			reg = inb(where);
+			if (register_values[i+2])
+				reg = inb(where);
 			reg &= register_values[i+2];
 			reg |= register_values[i+3];
 			outb(reg, where);
@@ -82,7 +85,8 @@ static void setup_resource_map_x_offset(const unsigned int *register_values, int
 			unsigned where;
 			unsigned long reg;
 			where = register_values[i+1] + offset_io_base;
-			reg = inl(where);
+			if (register_values[i+2])
+				reg = inl(where);
 			reg &= register_values[i+2];
 			reg |= register_values[i+3];
 			outl(reg, where);
diff --git a/src/southbridge/nvidia/ck804/ck804_early_setup_car.c b/src/southbridge/nvidia/ck804/ck804_early_setup_car.c
index c7263f5b79..6b2e3f5a61 100644
--- a/src/southbridge/nvidia/ck804/ck804_early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/ck804_early_setup_car.c
@@ -102,8 +102,8 @@ static void ck804_early_clear_port(unsigned ck804_num, unsigned *busn,
 				   unsigned *io_base)
 {
 	static const unsigned int ctrl_devport_conf_clear[] = {
-		PCI_ADDR(0, 0x1, 0, ANACTRL_REG_POS), ~(0x0000ff00), 0,
-		PCI_ADDR(0, 0x1, 0, SYSCTRL_REG_POS), ~(0x0000ff00), 0,
+		PCI_ADDR(0, 0x1, 0, ANACTRL_REG_POS), ~(0x0000ff01), 0,
+		PCI_ADDR(0, 0x1, 0, SYSCTRL_REG_POS), ~(0x0000ff01), 0,
 	};
 
 	int j;
@@ -211,9 +211,10 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
 		RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x1a, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)),
 #endif
 
-#if CK804_NUM > 1
+	};
+
+	static const unsigned int ctrl_conf_multiple[] = {
 		RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0, ~(3 << 2), (0 << 2),
-#endif
 	};
 
 	static const unsigned int ctrl_conf_slave[] = {
@@ -284,7 +285,12 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
 		if (busn[j] == 0) {
 			setup_resource_map_x_offset(ctrl_conf_master,
 				ARRAY_SIZE(ctrl_conf_master),
-				PCI_DEV(busn[0], CK804_DEVN_BASE, 0), io_base[0]);
+				PCI_DEV(0, CK804_DEVN_BASE, 0), io_base[0]);
+			if (ck804_num > 1)
+				setup_resource_map_x_offset(ctrl_conf_multiple,
+					ARRAY_SIZE(ctrl_conf_multiple),
+					PCI_DEV(0, CK804_DEVN_BASE, 0), 0);
+
 			continue;
 		}