Fix compilation for mtarvon. CAR initialization does early_mtrr_init,
jarell/debug.c isn't ready for gcc, and skip_romstage() doesn't compile. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -33,7 +33,6 @@
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#include "southbridge/intel/i3100/i3100_early_lpc.c"
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#include "southbridge/intel/i3100/i3100_early_lpc.c"
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#include "northbridge/intel/i3100/raminit.h"
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#include "northbridge/intel/i3100/raminit.h"
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#include "superio/intel/i3100/i3100.h"
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#include "superio/intel/i3100/i3100.h"
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#include "cpu/x86/lapic/boot_cpu.c"
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#include "cpu/x86/mtrr/earlymtrr.c"
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#include "cpu/x86/mtrr/earlymtrr.c"
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#include "superio/intel/i3100/i3100_early_serial.c"
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#include "superio/intel/i3100/i3100_early_serial.c"
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#include "northbridge/intel/i3100/memory_initialized.c"
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#include "northbridge/intel/i3100/memory_initialized.c"
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@ -52,10 +51,11 @@ static inline int spd_read_byte(u16 device, u8 address)
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#include "northbridge/intel/i3100/raminit.c"
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#include "northbridge/intel/i3100/raminit.c"
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#include "lib/generic_sdram.c"
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#include "lib/generic_sdram.c"
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#include "../jarrell/debug.c"
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#if 0 /* skip_romstage doesn't compile with gcc */
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#include "arch/i386/lib/stages.c"
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#include "arch/i386/lib/stages.c"
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#endif
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static void main(unsigned long bist)
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void main(unsigned long bist)
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{
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{
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msr_t msr;
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msr_t msr;
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u16 perf;
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u16 perf;
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@ -72,11 +72,12 @@ static void main(unsigned long bist)
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};
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};
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if (bist == 0) {
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if (bist == 0) {
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#if 0 /* skip_romstage doesn't compile with gcc */
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/* Skip this if there was a built in self test failure */
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/* Skip this if there was a built in self test failure */
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early_mtrr_init();
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if (memory_initialized()) {
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if (memory_initialized()) {
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skip_romstage();
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skip_romstage();
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}
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}
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#endif
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}
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}
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/* Set up the console */
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/* Set up the console */
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i3100_enable_superio();
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i3100_enable_superio();
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