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ryu: configure EC I2C pads as open drain 

The I2C pads connected to the EC are pulled to 3.3V. Therefore
the pads need to be configured as open drain.

BUG=chrome-os-partner:29981
BRANCH=None
TEST=Built and booted through depthcharge on ryu

Change-Id: Ie5eadfe6aca78eb31fbca4e8d8117d1061acbbec
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1530e7e7f500be47355eada56591ac2dbf1e9326
Original-Change-Id: Ia4ad2377d01296235fc7efbba72fa790016c04af
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/211135
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8916
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Aaron Durbin 2014-08-05 14:05:34 -05:00 committed by Patrick Georgi
parent 2b2b853b25
commit 8385cdf10b
1 changed files with 3 additions and 3 deletions
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6
src/mainboard/google/rush_ryu/romstage.c
View File

@ -31,9 +31,9 @@ static const struct pad_config padcfgs[] = {
/* TPM on I2C3 */
PAD_CFG_SFIO(CAM_I2C_SCL, PINMUX_INPUT_ENABLE, I2C3),
PAD_CFG_SFIO(CAM_I2C_SDA, PINMUX_INPUT_ENABLE, I2C3),
/* EC on I2C2 */
PAD_CFG_SFIO(GEN2_I2C_SCL, PINMUX_INPUT_ENABLE, I2C2),
PAD_CFG_SFIO(GEN2_I2C_SDA, PINMUX_INPUT_ENABLE, I2C2),
/* EC on I2C2 - pulled to 3.3V */
PAD_CFG_SFIO(GEN2_I2C_SCL, PINMUX_OPEN_DRAIN|PINMUX_INPUT_ENABLE, I2C2),
PAD_CFG_SFIO(GEN2_I2C_SDA, PINMUX_OPEN_DRAIN|PINMUX_INPUT_ENABLE, I2C2),
/* WP_L */
PAD_CFG_GPIO_INPUT(KB_ROW1, PINMUX_PULL_NONE),
};