diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 44028bead5..61ab75090b 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -82,6 +82,18 @@ config MAX_CPUS
 	int
 	default 80
 
+config INTEL_ACPI_BASE_ADDRESS
+	hex
+	default 0x500
+	help
+	  IO Address of ACPI.
+
+config INTEL_PCH_PWRM_BASE_ADDRESS
+	hex
+	default 0xfe000000
+	help
+	  PCH PWRM Base address.
+
 config PCR_BASE_ADDRESS
 	hex
 	default 0xfd000000
diff --git a/src/soc/intel/xeon_sp/include/soc/iomap.h b/src/soc/intel/xeon_sp/include/soc/iomap.h
index 2df5f8bfe1..ceaf271eb2 100644
--- a/src/soc/intel/xeon_sp/include/soc/iomap.h
+++ b/src/soc/intel/xeon_sp/include/soc/iomap.h
@@ -19,7 +19,7 @@
 #define SPI_BASE_SIZE                0x1000
 
 #define TCO_BASE_ADDRESS             0x400
-#define ACPI_BASE_ADDRESS            0x500
+#define ACPI_BASE_ADDRESS            CONFIG_INTEL_ACPI_BASE_ADDRESS
 #define ACPI_BASE_SIZE		0x100
 
 /* Video RAM */
@@ -31,7 +31,7 @@
 
 #define HECI1_BASE_ADDRESS	0xfed1a000
 
-#define PCH_PWRM_BASE_ADDRESS	0xfe000000
+#define PCH_PWRM_BASE_ADDRESS   CONFIG_INTEL_PCH_PWRM_BASE_ADDRESS
 #define PCH_PWRM_BASE_SIZE	0x10000
 
 #define P2SB_BAR                     CONFIG_PCR_BASE_ADDRESS