mb/google/brya: set PL4 value dynamically for thermal
Set PL4 value dynamically for brya board based on CPU SKUs which is detectable at runtime. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 with below messages, On brya (282): Overriding DPTF power limits PL1 (3000, 15000) PL2 (39000, 39000) PL4 (100000) On brya (482): Overriding DPTF power limits PL1 (4000, 28000) PL2 (43000, 43000) PL4 (105000) Change-Id: I20b98ccd8493ed238de647cda8ceb25f62029133 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56915 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -7,6 +7,7 @@
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#include <soc/pci_devs.h>
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#include <drivers/intel/dptf/chip.h>
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#include <intelblocks/power_limit.h>
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void variant_update_power_limits(const struct cpu_power_limits *limits, size_t num_entries)
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{
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@ -30,15 +31,19 @@ void variant_update_power_limits(const struct cpu_power_limits *limits, size_t n
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for (size_t i = 0; i < num_entries; i++) {
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if (mchid == limits[i].mchid) {
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struct dptf_power_limits *settings = &config->controls.power_limits;
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config_t *conf = config_of_soc();
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struct soc_power_limits_config *soc_config = conf->power_limits_config;
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settings->pl1.min_power = limits[i].pl1_min_power;
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settings->pl1.max_power = limits[i].pl1_max_power;
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settings->pl2.min_power = limits[i].pl2_min_power;
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settings->pl2.max_power = limits[i].pl2_max_power;
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printk(BIOS_INFO, "Overriding DPTF power limits PL1 (%u, %u) PL2 (%u, %u)\n",
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soc_config->tdp_pl4 = limits[i].pl4_power;
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printk(BIOS_INFO, "Overriding power limits PL1 (%u, %u) PL2 (%u, %u) PL4 (%u)\n",
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limits[i].pl1_min_power,
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limits[i].pl1_max_power,
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limits[i].pl2_min_power,
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limits[i].pl2_max_power);
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limits[i].pl2_max_power,
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limits[i].pl4_power);
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}
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}
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}
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@ -31,6 +31,7 @@ struct cpu_power_limits {
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unsigned int pl1_max_power;
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unsigned int pl2_min_power;
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unsigned int pl2_max_power;
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unsigned int pl4_power;
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};
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/* Modify Power Limit devictree settings during ramstage */
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