mb/google/hatch/var/jinlon: Increase reset deassert delay to 4 ms

With 1ms delay, reset is de-asserted too soon, before power is fully
up, causing a glitch to the reset signal. The issue is resolved with
4ms delay.

TEST=tested on google/jinlon device and observed the issue is resolved.
BUG=b:260253945

Signed-off-by: Eran Mitrani <mitrani@google.com>
Change-Id: I4efe916824cc193a7c2db7599b37f0d4de40bfce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79474
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Shelley Chen <shchen@google.com>

src/mainboard/google/hatch/variants/jinlon/ramstage.c

@@ -13,6 +13,6 @@ void variant_ramstage_init(void)
 	 * a minimum of 400us on Kohaku.
 	 */
 	gpio_output(GPP_C11, 1);
-	mdelay(1);
+	mdelay(4);
 	gpio_output(GPP_A12, 1);
 }