mb/google/brya/var/gimble: Update Slow Slew Rate

- Set slow slew rate VCCIA and VCCGT to 8

BUG=b:206704930
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.

Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I1e36c29e82af631cd650d46b67f031d275c97711
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60277
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: YH Lin <yueherngl@google.com>
This commit is contained in:
Mark Hsieh 2021-12-21 20:24:56 +08:00 committed by Tim Wawrzynczak
parent 355d8444a8
commit 83ef7a647d
1 changed files with 2 additions and 2 deletions

View File

@ -36,8 +36,8 @@ chip soc/intel/alderlake
register "TcssAuxOri" = "1"
# Acoustic settings
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_16"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_16"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1"