x86: Introduce RESET_VECTOR_IN_RAM option

Create a new Kconfig symbol that allows an x86 device to begin execution
when its reset vector is in DRAM and not at the traditional 0xfffffff0.

The implementation will follow later, this is just to setup various
ENV_xxx definitions correctly for the build environment.

Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35004
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

src/arch/x86/Kconfig

@@ -81,6 +81,13 @@ config AP_IN_SIPI_WAIT
 	default n
 	depends on ARCH_X86 && SMP
 
+config RESET_VECTOR_IN_RAM
+	bool
+	depends on ARCH_X86
+	help
+	  Select this option if the x86 soc implements custom code to handle the
+	  reset vector in RAM instead of the traditional 0xfffffff0 location.
+
 # Aligns 16bit entry code in bootblock so that hyper-threading CPUs
 # can boot AP CPUs to enable their shared caches.
 config SIPI_VECTOR_IN_ROM

src/arch/x86/memlayout.ld

@@ -16,6 +16,15 @@
 #include <memlayout.h>
 #include <arch/header.ld>
 
+/* Pull in the either CAR or early DRAM rules. */
+#if ENV_ROMSTAGE_OR_BEFORE
+#if ENV_CACHE_AS_RAM
+#define EARLY_MEMLAYOUT	"car.ld"
+#else
+#error "Early DRAM environment for x86 is work-in-progress. */
+#endif
+#endif
+
 SECTIONS
 {
 	/*
@@ -34,23 +43,20 @@ SECTIONS
 	 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
 	ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
 
-	/* Pull in the cache-as-ram rules. */
+	#include EARLY_MEMLAYOUT
-	#include "car.ld"
 #elif ENV_VERSTAGE
 	/* The 1M size is not allocated. It's just for basic size checking.
 	 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
 	VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M)
 
-	/* Pull in the cache-as-ram rules. */
+	#include EARLY_MEMLAYOUT
-	#include "car.ld"
 #elif ENV_BOOTBLOCK
 	/* This is for C_ENVIRONMENT_BOOTBLOCK. arch/x86/bootblock.ld contains
 	 * the logic for the romcc linking. */
 	BOOTBLOCK(0xffffffff - CONFIG_C_ENV_BOOTBLOCK_SIZE + 1,
 			CONFIG_C_ENV_BOOTBLOCK_SIZE)
 
-	/* Pull in the cache-as-ram rules. */
+	#include EARLY_MEMLAYOUT
-	#include "car.ld"
 
 #elif ENV_POSTCAR
 	POSTCAR(32M, 1M)

src/include/rules.h

@@ -271,7 +271,7 @@
 
 #if CONFIG(ARCH_X86)
 /* Indicates memory layout is determined with arch/x86/car.ld. */
-#define ENV_CACHE_AS_RAM		ENV_ROMSTAGE_OR_BEFORE
+#define ENV_CACHE_AS_RAM		(ENV_ROMSTAGE_OR_BEFORE && !CONFIG(RESET_VECTOR_IN_RAM))
 /* No .data sections with execute-in-place from ROM.  */
 #define ENV_STAGE_HAS_DATA_SECTION	!ENV_CACHE_AS_RAM
 /* No .bss sections for stage with CAR teardown. */

src/include/symbols.h

@@ -72,7 +72,7 @@ DECLARE_REGION(bl31)
  * (Does not necessarily mean that the memory is accessible.) */
 static inline int preram_symbols_available(void)
 {
-	return !CONFIG(ARCH_X86) || ENV_CACHE_AS_RAM;
+	return !CONFIG(ARCH_X86) || ENV_ROMSTAGE_OR_BEFORE;
 }
 
 #endif /* __SYMBOLS_H */