mb/google/volteer: Add settings for noise mitgation

Enable acoustic noise mitgation for volteer platforms.

BUG=b:153015585
BRANCH=none
TEST= Measure the change in noise level by changing the values
in devicetree.

Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Change-Id: I69a6453091bf607d3c5847c99bc077e6b7dbc639
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45053
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shaunak Saha 2020-09-02 15:47:31 -07:00 committed by Tim Wawrzynczak
parent 0d0f43f9d3
commit 84275161a9
3 changed files with 33 additions and 0 deletions

View File

@ -2,6 +2,17 @@ chip soc/intel/tigerlake
register "DdiPort1Hpd" = "0" register "DdiPort1Hpd" = "0"
register "DdiPort2Hpd" = "0" register "DdiPort2Hpd" = "0"
# Acoustic settings
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8"
register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1"
device domain 0 on device domain 0 on
device ref i2c0 on device ref i2c0 on
chip drivers/i2c/generic chip drivers/i2c/generic

View File

@ -49,6 +49,17 @@ chip soc/intel/tigerlake
register "HybridStorageMode" = "1" register "HybridStorageMode" = "1"
# Acoustic settings
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8"
register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1"
device domain 0 on device domain 0 on
device ref ipu on end device ref ipu on end
device ref i2c0 on device ref i2c0 on

View File

@ -7,6 +7,17 @@ chip soc/intel/tigerlake
register "HybridStorageMode" = "1" register "HybridStorageMode" = "1"
# Acoustic settings
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8"
register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1"
device domain 0 on device domain 0 on
device ref dptf on device ref dptf on
chip drivers/intel/dptf chip drivers/intel/dptf